Samsung Display Co., Ltd.

Samsung Electronics Co., Ltd.

Hynix Semiconductor Inc.

Other

Young-Wook Lee

Woo-Geun Lee

Jang-Soo Kim

Ki-Won Kim

Jae-Hyoung Youn

Pil-Sang Yun

Seung-Ha Choi

Hyun-Jung Lee

Ji-Soo Oh

Kap-Soo Yoon

Sang-Gab Kim

Jong-In Kim

Jean-Ho Song

Je-Hun Lee

Shi-Yul Kim

Hye-Young Ryu

Kyoung-Jae Chung

Do-Hyun Kim

Min-Seok Oh

Jong-in Kim

Dong-Ju Yang

Hong-Suk Yoo

Young-Joo Choi

Chang-Oh Jeong

Ki-Hun Jeong

Yu-Gwang Jeong

Sung-Hoon Yang

Hong-Kee Chin

Shin-Il Choi

Byeong-Beom Kim

Won-Joon Choi

Hyeon Jun Lee

Seung-Hwan Shim

Ki-Hong Lee

Je-Hyeong Park

Katsumi Abe

Hong-Sick Park

Jong-Hyun Choung

Bong-Kyun Kim

Byeong-Jin Lee

Eun-Seok Choi

Sun-Young Hong

Jung-In Park

Yang-Ho Bae

Hwa-Yeul Oh

Nam-Seok Suh

Hong-Long Ning

Se-Yun Lim

Sang-Bum Lee

Jae Woo Park

Chong-Chul Chai

Sung-Jin Kim

Mee-Hye Jung

Mun-Pyo Hong

Kyoung-Ju Shin

Keun-Kyu Song

Yeong-Keun Kwon

Gug-Rae Jo

Tae-Young Choi

Bo Sung Kim

Beom-Seok Cho

Byoung-Joo Kim

Beom-Yong Kim

Sung-Ryul Kim

Yui-Ku Lee

Jin-Seuk Kim

Woo-Seok Jeon

Kang-Woo Kim

Min-cheol Lee

Moon-Sig Joo

Hee-Hwan Choe

Min-Uk Kim

Youn-Hak Jeong

Jun-Hyung Souk

Won-Kie Chang

Hee Jun Byeon

Moon-Keun Choi

Kyoung-keun Son

Jae-Hyoung Yoon

Jun-Yeol Cho

Chong-Chul Chal

Youn-Hee Cha

A substrate including a first signal line and a first electrode disposed on the substrate, an oxide semiconductor layer pattern overlapping the first electrode, an insulating layer disposed between the first electrode and the oxide semiconductor layer pattern, a second signal line intersecting the first signal line, a second electrode electrically connected to the oxide semiconductor layer pattern, a third electrode electrically connected to the oxide semiconductor layer pattern and spaced apart from the second electrode, and an insulator comprising a first portion disposed between the first signal line and the second signal line, and at least partially overlapping with both of the first signal line and the second signal line.

Thin film transistor array substrate and manufacturing method thereof

A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.

Thin film transistor array panel and a method for manufacturing the same

A substrate including a gate line and a first electrode disposed on the substrate, an oxide semiconductor layer pattern overlapping the first electrode, an insulating layer disposed between the first electrode and the oxide semiconductor layer pattern, a data line intersecting the gate line, a second electrode electrically connected to the oxide semiconductor layer pattern, a third electrode electrically connected to the oxide semiconductor layer, the third electrode spaced apart from the second electrode, and an insulating pattern including a first portion which is disposed between the gate line and the data line and at least partially overlaps with both of the gate line and the data line.

A thin film transistor array panel includes a substrate, a first gate electrode disposed on the substrate, a voltage wire disposed on the substrate, a gate insulating layer disposed on the first gate electrode and the voltage wire, a semiconductor pattern including an oxide semiconductor material disposed on the gate insulating layer, a source electrode and a drain electrode disposed at a distance from each other on the semiconductor pattern, a first passivation layer disposed on the source electrode and the drain electrode, and a first electrode disposed on the first passivation layer and connected with the voltage wire.

Thin film transistor array panel with integrated gate driver including noise removal unit

A substrate including a gate line and a gate electrode disposed on a substrate, an oxide semiconductor layer pattern overlapping the gate electrode, a gate insulating layer disposed between the gate electrode and the oxide semiconductor layer pattern, a data line intersecting the gate line, a source electrode electrically connected to the oxide semiconductor layer pattern, a drain electrode electrically connected to the oxide semiconductor layer, the drain electrode spaced apart from the source electrode, and an insulating pattern including a first portion, which is disposed between the gate line and the data line and at least partially overlaps with both of the gate line and the data line.

Thin film transistor array panel with intergrated gate driver and manufacturing method thereof

A substrate including gate wirings including a gate line and a gate electrode disposed on a substrate, an oxide semiconductor layer pattern overlapping the gate electrode, a gate insulating layer disposed between the gate wirings and the oxide semiconductor layer pattern, data wirings including a data line crossing the gate line, a source electrode connected to one side of the oxide semiconductor layer pattern, and a drain electrode connected to another side of the oxide semiconductor layer, and an insulating pattern including a first portion which is disposed between the gate line and the data line and at least partially overlaps with both of the gate line and the data line.

A thin film transistor array panel includes: gate lines; data lines insulated from and crossing the gate lines; and shorting bars disposed outside of a display area in which the gate lines cross the data lines. The shorting bars overlap portions of the data lines disposed outside of the display area. The shorting bar includes a semiconductor material.

Thin film transistor array panel, manufacturing method thereof, and display device including the thin film transistor array panel

A substrate including gate wirings including gate line and a gate electrode disposed on the substrate, a storage line disposed on the same layer as the gate wirings, a gate insulating layer disposed on the gate wirings and the storage line, an oxide semiconductor layer pattern disposed on the gate insulating layer, data wirings including a data line crossing the gate line, a source electrode disposed on one side of the oxide semiconductor layer pattern, and a drain electrode disposed on another side of the oxide semiconductor layer, and an etch stopper including a first etch stopper portion disposed between the storage line and the data line and partially overlapping both the data line and the storage line.

The present invention relates to a liquid crystal display and a driving method thereof. The liquid crystal display of the present invention includes a pixel electrode including: a first subpixel electrode, a second subpixel electrode, and a third subpixel electrode electrically separated from each other; a first thin film transistor connected to the first subpixel electrode; a second thin film transistor connected to the second subpixel electrode; a third thin film transistor connected to the third subpixel electrode; a fourth thin film transistor connected to the second subpixel electrode and the third subpixel electrode; a first gate line connected to the first to third thin film transistors; a second gate line connected to the fourth thin film transistor; a data line connected to the first and second thin film transistors; and a storage electrode line connected to the third thin film transistor.

Liquid crystal display and driving method thereof

Thin film transistor array panel and manufacturing method thereof

A method of manufacturing a thin film transistor (TFT) array substrate includes forming a gate line and a gate electrode on a substrate, forming a gate-insulating layer and an oxide semiconductor layer on the gate line and the gate electrode, forming etch stop patterns at a thin-film transistor area and an area where the gate line and the data line overlap each other, forming a data conductor on the oxide semiconductor layer and the etch stop patterns, the data conductor comprising a source electrode and a drain electrode that constitute a TFT together with the gate electrode, and forming a data line extending in a direction intersecting the gate line.

A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.

Thin film transistor panel having an etch stopper on semiconductor

Growing community of inventors

Suwon-si, South Korea

Young-Wook Lee