Samsung Electronics Co., Ltd.

Young-Wi Ko

Sung-Hee Cho

Hyong-Gon Lee

Cheol-Ung Jang

Sang-Ki Hwang

Yun-Jin Cho

A polysilicon gate electrode of an integrated circuit field effect transistor is formed in two portions which are isolated from one another. The first portion is formed on the gate insulating region. The second portion is formed on the semiconductor substrate outside the gate insulating region and is electrically insulated from the first portion. Since the first and second portions of the polysilicon gate electrode are isolated from one another, only the charge which is on the first polysilicon portion contributes to gate insulating region degradation during plasma etching. After polysilicon gate electrode formation, the first and second portions may be electrically connected by a link. Field effect transistor performance and/or reliability are thereby increased.

Bifurcated polysilicon gate electrodes and fabrication methods

A nonvolatile semiconductor memory with a unit cell structure suitable for high speed operation and a low power supply voltage. The nonvolatile semiconductor memory includes a switching circuit including block select transistors connected by its respective terminal to a corresponding bit line. This switching circuit transmits a signal only when a string to which the switching circuit corresponds is selected. A second active region having a different impurity concentration from a first active region constituting source and drain regions of memory transistors is formed at a substrate contact portion of a bit line contact portion where the memory string and bit line are connected. The impurity concentration of the second active region is lower than that of the first active region.

Growing community of inventors

Seoul, South Korea

Young-Wi Ko