Samsung Electronics Co., Ltd.

Young Suk Ra

Hong Rak Son

Dong-Min Shin

Jae Hun Jang

Seong Hyeog Choi

Min Uk Kim

Man Keun Seo

Se Jin Lim

Tae Hyun Song

Ji Youp Kim

Han Byeul Na

A memory device includes an input unit configured to receive a plain text and output plain blocks and CTS plain block, a multi-core unit including a plurality of encryption/decryption cores configured to encrypt each of the plain blocks provided from the input unit and output cipher blocks in accordance with control of an encryption/decryption core control unit, a CTS core unit including a CTS core configured to encrypt the CTS plain block provided from the input unit into a CTS cipher block, and an output unit configured to receive the cipher blocks and the CTS cipher block and output a cipher text. The CTS plain block is generated through a CTS calculation based on the plain text.

Memory device and method for data encryption/decryption of memory device

An operating method of a memory controller is provided. The operating method includes receiving a first read data and a second conversion information, the second conversion information including data obtained by converting a second read data based on a linear operation, and the first read data and the second read data including data read from same memory cells; converting the first read data based on the linear operation to generate a first conversion information; performing a logical operation on the first conversion information and the second conversion information to generate an operation information; performing an inverse operation of the linear operation on the operation information to generate a reliability information; and correcting an error of the first read data based on the first read data and the reliability information.

Operating method of memory controller, storage device and the operating method thereof

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Seoul, South Korea

Young Suk Ra