Industrial Technology Research Institute

Young-Shying Chen

Chien-Chung Hung

Cheng-Tyng Yen

Chwan-Ying Lee

Ding-Yeong Wang

Keng-Ming Kuo

Chiao-Shun Chuang

Chi-Ming Chen

Chia-Pao Chang

Cheng-Wei Chien

Cheng-Chin Huang

Lien-Chang Wang

Chung-Chih Wang

Kai-Yu Chen

A magnetic sensor for sensing an external magnetic field includes first and second electrodes and first and second magnetic tunneling junctions. The first and second electrodes are disposed over a substrate; and the first and second magnetic tunneling junctions are conductively disposed between the first and second electrodes and connected in parallel between the first and second electrodes. The first and second magnetic tunneling junctions are arranged along a first easy axis of the magnetic sensor. The first magnetic tunneling junction includes a first pinned magnetization and a first free magnetization, and the second magnetic tunneling junction includes a second pinned magnetization and a second free magnetization. The first free magnetization and the second free magnetization are arranged substantially in parallel to the first easy axis and in substantially opposite directions.

Magnetic field sensors and sensng circuits

A circuit for sensing an external magnetic field includes first voltage source, first magnetic sensor, second magnetic sensor, bias voltage unit, clamp voltage current mirror unit, signal transfer amplifying unit. The first voltage source provides a power voltage. The first magnetic sensor provides a reference current. The second magnetic sensor senses an external magnetic field and the conductivity of the second magnetic sensor varies in response to the external magnetic field. The bias voltage unit connected to the first magnetic sensor and the second magnetic sensor provides a bias voltage to the first magnetic sensor and the second magnetic sensor. The clamp voltage current mirror unit generates a reference current for the first magnetic sensor and mirrors the reference current to the second magnetic sensor. The signal transfer amplifying unit generates an output voltage and an additional current to compensate the change in the conductivity of the second magnetic sensor.

Magnetic field sensors and sensing circuits

Provided is an integrated device having a MOSFET cell array embedded with a junction barrier Schottky (JBS) diode. The integrated device comprises a plurality of areas, each of which includes a plurality of MOS transistor cells and at least one JBS diode. Any two adjacent MOS transistor cells are separated by a separating line. A first MOS transistor cell and a second MOS transistor cell are adjacent in a first direction and separated by a first separating line, and the first transistor cell and a third MOS transistor cell are adjacent in a second direction and separated by a second separating line. The JBS diode is disposed at an intersection region between the first separating line and the second separating line. The JBS diode is connected in anti-parallel to the first, second and third MOS transistor cells.

Integrated device having MOSFET cell array embedded with barrier Schottky diode

A 3-axis magnetic field sensor on a substrate and including, a first tunneling magneto-resistor (TMR) having a first easy-axis for sensing a X-axis magnetic field, a second TMR having a second easy-axis for sensing a Y-axis magnetic field, an out-of-plane magnetic sensor for sensing a Z-axis magnetic field, and a reference unit is provided. The first easy-axis and the second easy-axis are orthogonal and include an angle of 45&#xb1;5 degrees with a bisection direction, respectively. The out-of-plane magnetic sensor includes a groove or bulge structure having a first incline and a second incline; a third TMR on the first incline having a third easy-axis; a fourth TMR on the second incline having a fourth easy-axis; and a central axis orthogonal to the bisection direction and parallel to the third easy-axis and the fourth easy-axis. The reference unit has a fifth TMR and a fifth easy-axis parallel to the bisection direction.

3-axis magnetic field sensor, method for fabricating magnetic field sensing structure and magnetic field sensing circuit

A Schottky barrier device includes a semiconductor substrate, a first contact metal layer, a second contact metal layer and an insulating layer. The semiconductor substrate has a first surface, and plural trenches are formed on the first surface. Each trench includes a first recess having a first depth and a second recess having a second depth. The second recess extends down from the first surface while the first recess extends down from the second recess. The first contact metal layer is formed on the second recess. The second contact metal layer is formed on the first surface between two adjacent trenches. The insulating layer is formed on the first recess. A first Schottky barrier formed between the first contact metal layer and the semiconductor substrate is larger than a second Schottky barrier formed between the second contact metal layer and the semiconductor substrate.

Schottky barrier device having a plurality of double-recessed trenches

A step trench metal-oxide-semiconductor field-effect transistor comprises a drift layer, a first semiconductor region, a stepped gate and a floating region. The drift layer is of a first conductivity type. The first semiconductor region is of a second conductivity type and located on the drift layer, wherein the drift layer and the first semiconductor region have a stepped gate trench therein. The stepped gate trench at least comprises a first recess located in the first semiconductor region and extending into the drift layer and a second recess located below a bottom of the first recess, wherein a width of the second recess is smaller than a width of the first recess. A floating region is of the second conductivity type and located in the drift layer below the second recess.

Stepped trench MOSFET and method of fabricating the same

A trench metal oxide semiconductor transistor device and a manufacturing method thereof are described. The trench metal oxide semiconductor transistor device includes a substrate of a first conductivity type, a drift region of the first conductivity type, a deep trench doped region of a second conductivity type, an epitaxial region of the second conductivity type, a trench gate, a gate insulating layer, a source region, a drain electrode and a source electrode. The drift region has at least one deep trench therein, and the deep trench doped region is disposed in the deep trench. The trench gate passes through the epitaxial region, and a distance between a bottom of the trench gate and a bottom of the deep trench doped region is 0.5&#x2dc;3 &#x3bc;m.

Trench MOS transistor having a trench doped region formed deeper than the trench gate

Magnetic field sensing method and apparatus of this disclosure uses two tunneling magneto-resistor (TMR) devices. Angles of the free magnetizations of the two TMR devices with respect to a fixed direction are set in a first to fourth period. In the first to fourth period, the two TMR devices act as a TMR sensing unit and a zero-field reference unit by turns, and each of the conductance difference between the sensing unit and the zero field reference unit is also obtained in each of the first to fourth period. Finally, the four conductance differences are summed up.

Magnetic field sensing methods and megnetic field sensing apparatuses using tunneling magneto-resistor devices

A SiC-based trench-type Schottky device is disclosed. The device includes: a SiC substrate having first and second surfaces; a first contact metal formed on the second surface and configured for forming an ohmic contact on the substrate; a drift layer formed on the first surface and including a cell region and a termination region enclosing the cell region; a plurality of first trenches with a first depth formed in the cell region; a plurality of second trenches with a second depth less than the first depth; a plurality of mesas formed in the substrate, each defined between neighboring ones of the trenches; an insulating layer formed on sidewalls and bottoms of the trenches; and a second contact metal formed on the mesas and the insulating layer, extending from the cell region to the termination region, and configured for forming a Schottky contact on the mesas of the substrate.

SiC-based trench-type schottky device

A simulating circuit for simulating a toggle magnetic tunneling junction (MTJ) element includes at least a synthetic Anti-Ferromagnetic free layer, a tunnel barrier layer, and a synthetic Anti-Ferromagnetic pinned layer. The simulating circuit is configured with a converting circuit, a status circuit, a storage circuit, a voltage computing circuit and a feature simulating circuit. The convert circuit converts the magnetic filed generated from a write in current to an equivalent voltage. The status circuit indicates the flipping status of the magnetic moment of the free layer. The storage circuit is used for representing data stored in the toggle magnetic tunneling junction element. The arrangement of the magnetic moment of the two Anti-Ferromagnetic adjacent to the tunnel barrier layer is represented by the voltage computing circuit. The voltage-current characteristic is represented by the feature simulating circuit.

Simulation circuit of toggle magnetic tunnel junction (MTJ) element

A data reading circuit of a magnetic memory applicable for reading data of a magnetic memory includes a first transistor, a second transistor connected to the first transistor in series, a third transistor, a fourth transistor connected to the third transistor in series, a first transmission gate electrically connected to the first transistor, a second transmission gate electrically connected to the first and third transistors, a comparison circuit having two input ends respectively connected to the first transistor, and a storage capacitor having an end electrically connected to the first transistor and the other end connected to a power end.

Data reading circuit of toggle magnetic memory

A data write in control circuit for magnetic random access memory is configured with a first transistor, a second transistor connected to the first transistor, a transmission gate connected to the first transistor, a comparator having two input terminal connected to the first transistor, a storage capacitor having one end connected to the first transistor and the other end connected to a power source or a ground, and a logic circuit having one end connected to the output terminal of the comparator and the other end receiving data to be written in.

Data write in control circuit for toggle magnetic random access memory

A magnetic memory array. A first bit line provides a first writing magnetic field to a magnetic memory cell. A second bit line provides a second writing magnetic field to a reference magnetic memory cell. A word line provides a third writing magnetic field to the magnetic memory cell and a fourth writing magnetic field to the reference magnetic memory cell. The third writing magnetic field exceeds the fourth writing magnetic field.

Growing community of inventors

Hsinchu, Taiwan

Young-Shying Chen