Hynix Semiconductor Inc.

Young Ok Hong

Kyoung Hwan Park

Myung Shik Lee

Hack Seob Shin

Yu Jin Park

Ki Hong Lee

Dong Hwan Lee

Jung Ryul Ahn

Eun Seok Choi

Se Jun Kim

Ki Seon Park

Hyun Seung Yoo

Won Sic Woo

Moon Sig Joo

Kyung Pil Hwang

Yong Top Kim

Jae Young Park

A method for fabricating a non-volatile memory device with asymmetric source/drain junctions, wherein a gate stack is formed on a semiconductor substrate, and impurity ions are implanted at a predetermined angle to form a source/drain junction in the semiconductor substrate. Thermal treatment of the semiconductor substrate forms an asymmetrically disposed source/drain junction between adjacent gate stacks.

Method for fabricating a non-volatile memory device

A flash memory device includes a substrate; a cell stack having a semiconductor layer for providing junction areas and channel areas and an interlayer isolation layer for insulating the semiconductor layer, wherein the semiconductor layer and the interlayer isolation layer are repeatedly stacked; an array of gate columns, the gate columns penetrating through the cell stack, perpendicular to the substrate; and a trap layered stack introduced into an interface between the gate columns and the cell stack to store charge.

Flash memory device with an array of gate columns penetrating through a cell stack

Disclosed herein are non-volatile memory devices with asymmetric source/drain junctions and a method for fabricating the same. According to the method, a gate stack is formed on a semiconductor substrate, and impurity ions are implanted at a predetermined angle to form a source/drain junction in the semiconductor substrate. Thermal treatment of the semiconductor substrate forms an asymmetrically disposed source/drain junction between adjacent gate stacks.

Non-volatile memory device having asymmetric source/drain junction and method for fabricating the same

A nonvolatile memory device and a method of fabricating the same is provided to prevent charges stored in a charge trap layer from moving to neighboring memory cells. The method of fabricating a nonvolatile memory device, includes forming a first dielectric layer on a semiconductor substrate in which active regions are defined by isolation layers, forming a charge trap layer on the first dielectric layer, removing the first dielectric layer and the charge trap layer over the isolation layers, forming a second dielectric layer on the isolation layers including the charge trap layer, and forming a conductive layer on the second dielectric layer.

Nonvolatile memory device and method of fabricating the same

A flash memory device includes a substrate, a cell stack having a semiconductor layer, in which junction areas for setting areas therebetween to channel areas are formed in a shape of a stripe, and an interlayer isolation layer for insulating the semiconductor layer, wherein the semiconductor layer and the interlayer isolation layer are repeatedly stacked. The flash memory device further includes an array of gate columns penetrating through the cell stack, perpendicular to the substrate and cutting through the junction areas to dispose the junction areas at both sides thereof, and a trap layered stack introduced into an interface between the gate column and the cell stack to store charge.

Manufacturing method of flash memory device comprising gate columns penetrating through a cell stack

A metal line of a semiconductor device comprising contact plugs, a plurality of first trenches, first metal lines, a plurality of second trenches, and second metal lines. The contact plugs are formed over a semiconductor substrate and are insulated from each other by a first insulating layer. The plurality of first trenches are formed in the first insulating layer and are connected to first contact plugs of the contact plugs. The first metal lines are formed within the first trenches and are connected to the first contact plugs. The plurality of second trenches are formed over the first metal lines and the first insulating layer and comprise a second insulating layer connected to second contact plugs of the contact plugs. The second metal lines are formed within the second trenches and are connected to the second contact plugs.

Metal line of semiconductor device and method of fabricating the same

A method of manufacturing flash memory devices wherein, after gate lines are formed, an HDP oxide film having at least the same height as that of a floating gate is formed between the gate lines. Spacers are formed between the remaining spaces using a nitride film. Accordingly, the capacitance between the floating gates can be lowered. After an ion implantation process is performed, spacers can be removed. It is therefore possible to secure contact margin of the device.

Method of manufacturing flash memory device

A method of fabricating flash memory devices includes the steps of forming a stop nitride film and an oxide film on a semiconductor substrate having a predetermined structure formed therein, forming trenches in the oxide film and the stop nitride film, forming barrier oxide films on lateral faces of the trenches by an atomic layer deposition method, and forming bit lines within the trenches.

Method of fabricating flash memory device

The present invention relates to a method of forming a floating gate electrode of a flash memory device. According to the present invention, the method includes the steps of forming a first silicon film for floating gate electrode and a pad nitride film on a semiconductor substrate, and patterning the pad nitride film, the first silicon film and a predetermined region of the semiconductor substrate to define trenches, forming buried insulation films in the defined trenches, and then performing a polishing process until the pad nitride film is exposed, thereby completing a process of forming isolation films, removing the patterned pad nitride film, and forming second silicon films for floating gate electrodes in the regions from which the pad nitride films are removed, and forming patterns for forming cylinder-shaped floating gate electrodes on the second silicon films, and performing an etch process on the second silicon films using the patterns as etch masks to form the cylinder-shaped floating gate electrode patterns on the first silicon films for floating gate electrodes.

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Icheon-si, South Korea

Young Ok Hong