Samsung Electronics Co., Ltd.

Mosaid Technologies Corporation

Dongwoo Fine-chem Co., Ltd.

Conversant Intellectual Property Management Incorporated

Young-Nam Kim

Dong-Min Kang

Young-Sam Lim

Hyun-joon Kim

Hyung-Suk Cho

Sang-Hyun Yi

Chun-Deuk Lee

Yu-sin Yang

Ji-Young Shin

Masayuki Takashima

Jong-An Kim

Gi-Jung Kim

Myun-Kyu Park

Jung-Jea Myung

Byoung-Woo Son

Bo-Ram Kang

Sun-Young Lee

Pil-Kyu Kang

Young-Seok Kim

Jin-Sung Kim

Young-Soo Park

Jung-hun Lim

Jong-Sun Peak

Kui-Jong Baek

Sun-Jin Kang

Bu-Dl Yoo

Woong Hahn

Hyun-Dam Jeong

A semiconductor device including a semiconductor substrate, an integrated circuit on the semiconductor substrate, an insulation layer covering the integrated circuit, and a plurality of metal line patterns on the insulation layer. First and second adjacent metal line patterns of the plurality of metal line patterns are spaced apart from each other by a space, and each of the first and second adjacent metal line patterns has at least one slit.

Semiconductor device having metal lines with slits

An apparatus and method to inspect a defect of a substrate. Since a recess of an under layer of a substrate is darker than a projection of a top layer, a ratio of a value of a secondary electron signal (of an SEM) of the under layer to a value of the top layer may be increased to improve a pattern image used to inspect an under layer defect. Several conditions under which electron beams are irradiated may be set, and the pattern may be scanned under such conditions. Secondary electron signals may be generated according to the conditions and converted into image data to display various pattern images. Scan information on the images may be stored with positional information on the substrate. Each of scan information on the pattern images may be calculated to generate a new integrated image.

Apparatus and method to inspect defect of semiconductor device

In an etching composition for an under-bump metallurgy (UBM) layer and a method of forming a bump structure, the etching composition includes about 40% by weight to about 90% by weight of hydrogen peroxide (HO), about 1% by weight to about 20% by weight of an aqueous basic solution including ammonium hydroxide (NHOH) or tetraalkylammonium hydroxide, about 0.01% by weight to about 10% by weight of an alcohol compound, and about 2% by weight to 30% by weight of an ethylenediamine-based chelating agent. The etching composition may effectively etch the UBM layer including titanium or titanium tungsten and remove impurities. A method of forming a bump structure may employ such an etching composition.

Etching composition for an under-bump metallurgy layer

An apparatus for measuring a semiconductor device is provided. The apparatus includes a beam emitter configured to irradiate an electron beam onto a sample having the entire region composed of a critical dimension (CD) region, which is formed by etching or development, and a normal region connected to the CD region, and an analyzer electrically connected to the beam emitter, and configured to select and set a wavelength range of a region in which a difference in reflectance between the CD region and the normal region occurs, after obtaining reflectance from the electron beam reflected by a surface of the sample according to the wavelength of the electron beam. A method of measuring a semiconductor device using the measuring apparatus is also provided. Therefore, it is possible to minimize a change in reflectance due to the thickness and properties of the semiconductor device, and set a wavelength range to monitor a specific wavelength, thereby accurately measuring and analyzing a CD value of a measurement part of the semiconductor device.

Apparatus and method for measuring semiconductor device

An embodiment of a semiconductor device includes a semiconductor substrate, a first insulating layer formed over the semiconductor substrate, and a first semiconductor layer formed over the first insulation layer. At least one gettering region is formed in at least one of the first insulating layer and the first semiconductor layer. The gettering region includes a plurality of gettering sites, and at least one gettering site includes one of a precipitate, a dispersoid, an interface with the dispersoid, a stacking fault and a dislocation.

Gettering structures and methods and their application

Method of forming a bump structure using an etching composition for an under bump metallurgy layer

An apparatus and method to inspect a defect of a semiconductor device. The amount of secondary electrons generated due to a scanning electron microscope (SEM) may depend on the topology of a pattern of a semiconductor substrate. The amount of secondary electrons emitted from a recess of an under layer is far smaller than that of secondary electrons emitted from a projection of a top layer. Since the recess is darker than the projection, a ratio of a value of a secondary electron signal of the under layer to a value of a secondary electron signal of the top layer may be increased in order to improve a pattern image used to inspect a defect in the under layer. To do this, a plurality of conditions under which electron beams (e-beams) are irradiated may be set, at least two may be selected out of the set conditions, and the pattern may be scanned under the selected conditions. Thus, secondary electron signals may be generated according to the respective conditions and converted into image data so that various pattern images may be displayed on a monitor. Scan information on the pattern images may be automatically stored in a computer storage along with positional information on a predetermined portion of the semiconductor substrate. When calculation conditions are input to a computer, each of scan information on the pattern images may be calculated to generate a new integrated pattern image.

In one aspect, a composition is provided which is capable of removing an insulation material which includes at least one of a low-k material and a passivation material. The composition of this aspect includes about 5 to about 40 percent by weight of a fluorine compound, about 0.01 to about 20 percent by weight of a first oxidizing agent, about 10 to about 50 percent by weight of a second oxidizing agent, and a remaining water.

Composition for removing an insulation material, method of removing an insulation layer and method of recycling a substrate using the same

A composition for removing an insulation material and related methods of use are disclosed. The composition comprises about 1 to 50 percent by weight of an oxidizing agent, about 0.1 to 35 percent by weight of a fluorine-containing compound, and water. The insulation material comprises at least one of a low-k material and a protection material.

Composition for removing an insulation material and related methods

The surface(s) of a polishing pad for polishing an object has a first portion including hydrophilic material and a second portion including hydrophobic material. The first portion of the polishing surface is located in a first region of the polishing pad and the second portion of the polishing surface is located in a second region of the polishing pad juxtaposed with the first region in the radial direction of the pad. The hydrophilic material may be a polymer resin that contains hydrophilic functional groups having OH and/or &#x2550;O at bonding sites of the polymer. The hydrophobic material may be a polymer resin that contains hydrophobic functional groups having H and/or F at bonding sites of the polymer. The polishing pad is manufactured by extruding respective lines of the hydrophilic and hydrophobic materials. The extruders and a backing are moved relative to each other such that the lines form concentric rings of the hydrophilic and hydrophobic materials.

Polishing pad of a chemical mechanical polishing apparatus and method of manufacturing the same

A material layer containing impurities that react with water molecules is formed on a substrate. The material layer is then heated under a pressure exceeding one atmosphere and in the presence of water vapor to generate pores in the material layer. The material layer may form the interlayer insulating layer of a semiconductor device.

Method of forming a porous material layer in a semiconductor device

Growing community of inventors

Suwon-si, South Korea

Young-Nam Kim