Samsung Electronics Co., Ltd.

Young-Lim Park

Jin-il Lee

Sung-lae Cho

Jong-Bom Seo

Se Hyoung Ahn

Hye-Young Park

Byoung-Jae Bae

Kyuho Cho

Sunmin Moon

Sang Yeol Kang

Chang Mu An

Hanjin Lim

Dongho Ahn

Hyeong-Geun An

Gyuhwan Oh

Dong-Hyun Im

Kyooho Jung

Gyu-Hwan Oh

Choong-Man Lee

Sun-Min Moon

Kyoo Ho Jung

Soonoh Park

Ji-Eun Lim

Jinil Lee

Changmu An

Suhwan Kim

Younsoo Kim

Yong-Ho Ha

Dong-Ho Ahn

Soon-Oh Park

Joon-Sang Park

Kyu-Ho Cho

Dong-ho Ahn

Jun-Young Jang

Sangyeol Kang

Han-Bong Ko

Dong-Won Lim

Eun-Hee Cho

Sang-Wook Lim

Young-Soo Lim

Jeong-Gyu Song

Hye-young Park

Joohyun Jeon

Gyeo-Re Lee

Youngseok Kim

Jung-Hyeon Kim

Young-Geun Park

Sugwoo Jung

Sihyung Lee

Sang-Yeol Kang

Sung-Lae Cho

Hyun-jun Kim

Changyup Park

Jin-Ha Jeong

Kongsoo Lee

Chang-Su Kim

Jae-wan Chang

Ho-Kyun An

Insang Jeon

ChangSu Kim

Youngkuk Kim

Urazaev Vladimir

Wook-Yeol Yi

Yukyung Shin

WonSeok Yoo

Cheol Jin Cho

Hyokyoung Kim

Su-hwan Kim

Seong-yul Park

Seung-Back Shin

Hyeung-Geun An

Jin-II Lee

Jin-Il Lee

Hongseon Song

Chang-Hwa Jung

A capacitor structure includes lower and electrodes, and a capacitor dielectric film interposed therebetween. The lower electrode includes a lower electrode film including a first metal element, a first doped oxide film including a second metal element and an oxide of the first metal element, and a first metal oxide film. The first metal oxide film includes an oxide of the first metal element and is free of the second metal element. The upper electrode includes an upper electrode film including the first metal element, a second doped oxide film including the second metal element and an oxide of the first metal element, and a second metal oxide film that includes an oxide of the first metal element, and is free of the second metal element.

Capacitor structure, semiconductor memory device including the structure, and method for manufacturing the structure

Semiconductor device may include a landing pad and a lower electrode that is on and is connected to the landing pad and includes an outer portion and an inner portion inside the outer portion. The outer portion includes first and second regions. The semiconductor devices may also include a dielectric film on the first region of the outer portion on the lower electrode and an upper electrode on the dielectric film. The first region of the outer portion of the lower electrode may include a silicon (Si) dopant, the dielectric film does not extend along the second region of the outer portion. A concentration of the silicon dopant in the first region of the outer portion is different from a concentration of the silicon dopant in the second region of the outer portion and is higher than a concentration of the silicon dopant in the inner portion.

Semiconductor devices and methods for fabricating thereof

Disclosed are semiconductor devices and fabrication methods for the same. The semiconductor devices may include a bottom electrode, a dielectric layer, and a top electrode that are sequentially stacked on a semiconductor substrate. The bottom electrode includes a first doping region in contact with the dielectric layer, a main region spaced apart from the dielectric layer by the first doping region intervening therebetween, and a second doping region between the first doping region and the main region. Each of the first and second doping regions includes oxygen and a doping metal. In some embodiments, the second doping region may include nitrogen. The main region may be devoid of the doping metal. An amount of oxygen in the second doping region is less than an amount of oxygen in the first doping region.

Semiconductor devices and methods of fabricating the same

Disclosed is a semiconductor device including a bottom electrode, a dielectric layer, and a top electrode that are sequentially disposed on a substrate. The dielectric layer includes a hafnium oxide layer including hafnium oxide having a tetragonal crystal structure, and an oxidation seed layer including an oxidation seed material. The oxidation seed material has a lattice constant having a lattice mismatch of 6% or less with one of a horizontal lattice constant and a vertical lattice constant of the hafnium oxide having the tetragonal crystal structure.

Semiconductor device including capacitor

Disclosed are semiconductor memory devices and methods of fabricating the same. The semiconductor memory device comprises a capacitor that includes a bottom electrode, a top electrode opposite to the bottom electrode across a dielectric layer, and an interface layer between the bottom electrode and the dielectric layer. The interface layer includes a combination of niobium (Nb), titanium (Ti), oxygen (O), and nitrogen (N), and further includes a constituent of the dielectric layer.

Semiconductor memory device and method of fabricating the same

A semiconductor device includes a landing pad on a substrate, a lower electrode on the landing pad and connected to the landing pad, the lower electrode including an outer portion, the outer portion including first and second regions, and an inner portion inside the outer portion, a dielectric film on the lower electrode to extend along the first region of the outer portion, and an upper electrode on the dielectric film, wherein the outer portion of the lower electrode includes a metal dopant, a concentration of the metal dopant in the first region of the outer portion being different from a concentration of the metal dopant in the second region of the outer portion.

Semiconductor device

A semiconductor device includes a landing pad on a substrate, a lower electrode on the landing pad, the lower electrode being electrically connected to the landing pad, a dielectric layer on the lower electrode, the dielectric layer extending along a profile of the lower electrode, an upper electrode on the dielectric layer, and an upper plate electrode on the upper electrode and including first fluorine (F) therein, wherein the upper plate electrode includes an interface facing the upper electrode, and wherein the upper plate electrode includes a portion in which a concentration of the first fluorine decreases as a distance from the interface of the upper plate electrode increases.

Semiconductor device electrodes including fluorine

An integrated circuit (IC) device includes an electrode, a dielectric layer facing the electrode, and a plurality of interface layers interposed between the electrode and the dielectric layer and including a first metal. The plurality of interface layers includes a first interface layer and a second interface layer. An oxygen content of the first interface layer is different from an oxygen content of the second interface layer.

Integrated circuit device having dielectric layer, and method and apparatus for manufacturing the integrated circuit device

Semiconductor device and method of fabricating the same

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Anyang-si, South Korea

Young-Lim Park