Samsung Electronics Co., Ltd.

Young-Kwan Park

Keun-Ho Lee

Dae-Sin Kim

Seon-Young Lee

Sang-Woo Oh

Dong-won Kim

Nak-jin Son

Jin-kyu Park

Ui-hui Kwon

Hyun-joo Kim

Chang-wook Jeong

Shin-Wook Yi

Seung-Hyun Song

Ji-Woong Sue

Kwang-Seok Lee

Masatomo Nakazato

Tetsunori Wada

Jae-sung Shin

Seung-mo Kim

A semiconductor device including a substrate having a trench formed therein, a plurality of gate structures, an isolation layer pattern and an insulating interlayer pattern. The substrate includes a plurality of active regions defined by the trench and spaced apart from each other in a second direction. Each of the active regions extends in a first direction substantially perpendicular to the second direction. Each of the plurality of gate structures includes a tunnel insulation layer pattern, a floating gate, a dielectric layer pattern and a control gate sequentially stacked on the substrate. The isolation layer pattern is formed in the trench. First isolation layer pattern has at least one first air gap between sidewalls of at least one adjacent pair of the floating gates. The insulating interlayer pattern is formed between the gate structures, and the first insulating interlayer pattern extends in the second direction.

Semiconductor devices including an air-gap and methods of manufacturing the same

Provided are a method for fabricating a semiconductor device The method for fabricating include providing a substrate including a first region and a second region, the first region including first and second sub-regions, and the second region including third and fourth sub-regions, forming first to fourth fins on the first and second regions to protrude from the substrate, the first fin being formed on the first sub-region, the second fin being formed on the second sub-region, the third fin being formed on the third sub-region, and the fourth fin being formed on the fourth sub-region, forming first to fourth dummy gate structures to intersect the first to fourth fins, the first dummy gate structure being formed on the first fin, the second dummy gate structure being formed on the second fin, the third dummy gate structure being formed on the third fin, and the fourth dummy gate structure being formed on the fourth fin, forming a first doped region in each of the first and second fins and a second doped region in each of the third and fourth fins by doping impurities into the first to fourth fins on both sides of the first to fourth dummy gate structures by performing an ion implantation process simultaneously in the first and second regions; and removing the first doped region of the first fin and the second doped region of the third fin, or removing the first doped region of the second fin and the second doped region of the fourth fin.

Method for fabricating semiconductor device

Analysis of an electromagnetic wave traveling in an optical device, can be performed quickly and correctly. A structure forming process simulator forms an analysis structure of a physical object to be analyzed. A hybrid optical simulator calculates time-independent data and time-dependent data of an electromagnetic field by dividing the analysis structure into parts, determining whether a metallic or magnetic material is included in each of the divided parts, and selectively applying a Beam Propagation Method (BPM) or a Finite Difference Time Domain (FDTD) method to the divided parts. A storage device stores the time-independent data and the time-dependent data output from the hybrid optical simulator as hybrid electric field data. Related methods are also described.

Hybrid apparatus and methods for analyzing electromagnetic waves

An example embodiment relates to a semiconductor memory device including a plurality of cylindrical bottom electrodes arranged in a first direction and in a second direction. The device includes a supporting base configured to support the plurality of cylindrical bottom electrodes by contacting side surfaces of the plurality of cylindrical bottom electrodes. The supporting base includes first patterns in which first open areas are formed, and second patterns in which second open areas are formed. The first patterns and the second patterns have different oriented shapes.

Semiconductor memory device having capacitor and semiconductor device

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Suwon-si, South Korea

Young-Kwan Park