Amkor Technology Singapore Holding Pte. Ltd.

Samsung Electronics Co., Ltd.

Other

Hewlett-packard Development Company, L.p.

Skhynix Inc.

Hynix Semiconductor Inc.

Amkor Technology, Inc.

Inha University Research and Business Foundation

Innobation Bio Co., Ltd.

Postech Academy-industry Foundation

Young Ju Lee

Byong Jin Kim

Gi Jeong Kim

Marc Alan Mangrum

Jae Min Bae

Seung Mo Kim

Hyung Jun Cho

Yi Seul Han

Jae Beom Shim

Kyeong Tae Kim

Tae Ki Kim

Min Jae Yi

Young Soo Kim

Young Jun Hong

Jae Kwang Hwang

Sung Jun Kim

Seungtae Ko

Byung Hoon Ko

Yoon Soo Kim

Won Bin Hong

Ji Yeon Ryu

Jun Ho Park

Byung Chul Kim

Kyung Hee Kim

Hyung Soon Park

Jungsuek Oh

Jae Chun Lee

Jong Han Shin

Sang Jae Park

Jinwoo Noh

SeungSup Lee

In Hoe Kim

Jung Yub Lee

Byong Chul Yoo

Jum Yong Park

Sang Myung Woo

Doo Seok Choi

Beom Kyu Choi

Young Jae Cho

Jun Hwa Lee

Jeung Joo Lim

The present invention relates to an apparatus for diagnosing solid cancers comprising lung cancer, pancreatic cancer, bile duct cancer, colorectal cancer, breast cancer, gastric cancer, brain tumors, kidney cancer, liver cancer, and cervical cancer. More specifically, the apparatus comprises: a concentration measurement unit for measuring the concentration of each of acyl-carnitine (AC), nudifloramide (2PY), and lysophosphatidylcholine (LPC) from a biological sample; a pre-processing unit for pre-processing the measured concentrations; and a diagnosis unit for determining the diagnosis information of cancer through linear discriminant analysis using the pre-processed concentrations.

Apparatus for diagnosing solid cancers and method for providing information on solid cancer diagnosis

An electronic device includes a substrate having a conductive structure with a substrate outward terminal at a second side of the substrate. A dielectric structure with an opening is adjacent to the second side. An electronic component is coupled to the substrate and an encapsulant encapsulates the electronic component. The substrate outward terminal comprises a multi-via terminal or a multi-stage via. The multi-via terminal includes pad conductive vias in the opening, a pad dielectric via interposed between the pad conductive vias, and a conductor comprising a conductor top side with micro dimples over the pad conductive vias and the pad dielectric via. The multi-stage terminal includes a pad base within the opening having a top side recessed below an upper surface the dielectric and a pad head coupled to the pad base within the opening, the pad head having a top side with a micro dimple.

Semiconductor devices and methods of manufacturing semiconductor devices

A method for forming packaged electronic device structure includes providing a conductive leadframe. The leadframe can include a die pad and a plurality of conductive leads. The method can include coupling an electronic device to the plurality of conductive leads. The method can include providing an antenna structure, which can include a conductive pillar structure and an elongated conductive beam structure. The method can include providing a package body encapsulating the electronic device, at least portions of each conductive lead, and at least portions of the die pad. In an example, the conductive pillar structure can extend from the first package body surface to the second package body surface, the elongated conductive beam structure can be disposed adjoining the first package body surface and can be electrically connected to the conductive pillar structure, and a portion of the elongated conductive beam structure can be exposed outside of the package body.

Packaged electronic device having integrated antenna and locking structure

In one example, an electronic device includes a substrate with a substrate front side, a substrate rear side opposite to the substrate front side, a substrate body, and conductive vias extending through the substrate body from the substrate front side to the substrate rear side. A first construct is over the substrate front side and includes a first dielectric structure and first conductors embedded in the first dielectric structure and coupled to the conductive vias. A second construct is over the substrate rear side and includes a second dielectric structure and second conductors embedded in the second dielectric structure and coupled to the conductive vias. One or more of the first conductors or the second conductors define one or more passive devices. Other examples and related methods are also disclosed herein.

Electronic devices and methods of manufacturing electronic devices

In one example, an electronic device includes a substrate having a conductive structure. The conductive structure includes a substrate inward terminal at a first side of the substrate and a substrate outward terminal at a second side of the substrate. The substrate includes a dielectric structure with a first opening is at the second side. An electronic component is at the first side of the substrate and is electrically coupled to the substrate inward terminal, and an encapsulant encapsulates the electronic component. The substrate outward terminal comprises one of a multi-via terminal or a multi-stage via. The multi-via terminal includes pad conductive vias in the first opening a pad dielectric via interposed between the pad conductive vias in the first opening and a conductor comprising a conductor top side with micro dimples over the pad conductive vias and the pad dielectric via. The multi-stage terminal includes a pad base within the first opening having a pad base top side recessed below an upper surface the first dielectric and a pad head coupled to the pad base within the first opening, the pad head having a pad head top side with a micro dimple. Other examples and related methods are also disclosed herein.

A method for forming packaged electronic device structure includes providing a conductive leadframe. The leadframe can include a die pad with a first major surface and a second major surface opposite to the first major surface, and a plurality of conductive leads. The method can include coupling an electronic device to the plurality of conductive leads. The method can include providing an antenna structure, which can include a conductive pillar structure and an elongated conductive beam structure. The method can include providing a package body encapsulating the electronic device, at least portions of each conductive lead, and at least portions of the die pad. In an example, the conductive pillar structure can extend from the first package body surface to the second package body surface, the elongated conductive beam structure can be disposed adjoining the first package body surface and is electrically connected to the conductive pillar structure, and at least a portion of the elongated conductive beam structure is exposed outside of the package body.

An image forming apparatus includes a main body, a development cartridge supplying toner accommodated in a toner accommodating portion to an electrostatic latent image formed on a photoconductor to form a toner image, a toner refilling portion in the development cartridge and on which a toner refill cartridge for refilling toner in the toner accommodating portion is mounted, and a controller controlling operations of the image forming apparatus based on a connection between the development cartridge mounted on the main body and the toner refill cartridge mounted on the toner refilling portion. The toner refilling portion connects the toner refill cartridge to the main body through an interface between the development cartridge and the main body.

Toner refill cartridge connected to main body through interface between development cartridge and main body

The present disclosure relates to a pre-5-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4-Generation (4G) communication system such as Long Term Evolution (LTE). The present disclosure relates to a pre-5th-generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-generation (4G) communication system such as long term evolution (LTE). According to various embodiments of the present disclosure, an apparatus in a wireless communication system comprises an antenna array configured to steer a first beam using antenna elements, and a lens including a first focal point and a second focal point. The lens is configured to generate a second beam of a plane wave by compensating for a phase error of the steered first beam passing through at least one of the first focal point or the second focal point.

Method and apparatus for efficiently transmitting beam in wireless communication system

In a method of processing a thin layer according to an embodiment, a substrate having a processing target layer is provided into a polishing module of a thin layer processing apparatus. A chemical mechanical polishing process using a polishing slurry is performed on the processing target layer. The substrate is cleaned using a cleaning slurry.

Method of processing thin layer

A body sensor, a system including the body sensor and a method of transmitting a biosignal are provided. A wearable body sensor includes a conductive electrode configured to conduct a biosignal from a body, a main board comprising a radio frequency (RF) communication circuit to generate an RF signal based on the biosignal, and an antenna disposed on the RF communication circuit to radiate the RF signal.

Wearable body sensor and system including the same

A packaged electronic device includes an integrated antenna as part of a conductive leadframe. The conductive leadframe includes a die paddle have an elongated conductive beam structure configured as a transmission line, and a ground plane structure disposed surrounding the die paddle. The ground plane includes a gap where the transmission line extends to an edge of the packaged electronic device. In one embodiment, selected leads within the leadframe are configured with conductive connective structures as ground pins, source pins, and/or wave guides. In an alternate embodiment, a portion of the integrated antenna is embedded and partially exposed within the body of the packaged electronic device.

An automatic filling up spuit () screwed to an entrance () of a cosmetics container () for suctioning and discharging liquid stored in the cosmetics container () includes: a spuit pipe (); a cylinder member (); a piston member (); a cylindrical push button (); and a top/bottom-opened cylindrical enclosure (). The automatic filling up spuit has an advantage of convenient use in that it is capable of automatically filling up liquid contents in a cosmetics container by a certain amount precisely at all times through joining with the cosmetics container without requiring a separate filling up operation.

Automatic filling up spuit

A semiconductor device having vertically aligned transistors made from pillar structures that have flat side surfaces is presented. The semiconductor device includes a semiconductor substrate, spacers, and gates. The semiconductor substrate has pillar structures that have flat side surfaces. The spacers are on sidewalls only on the upper portions of the pillar structures. The gates surround lower portions of the pillar structures.

Semiconductor device having vertically aligned pillar structures that have flat side surfaces and method for manufacturing the same

A FIFO memory device includes a write address generating circuit generating a write address in response to a write clock signal and a read address generating circuit generating a read address in response to a read clock signal. A memory cell array includes a plurality of memory cells arranged between a plurality of write and read word lines and a plurality of write and read bit lines, the memory cell array storing write data in response to the write address and outputting read data in response to the read address. A flag signal generating circuit compares a next write address with a current read address to generate a full flag signal in response to the write clock signal when the next write address and the current read address are equal, and compares a current write address with a next read address to generate an empty flag signal in response to the read clock signal when the current write address and the next read address are equal.

First-in first-out memory device and method of generating flag signal in the same

Growing community of inventors

Seoul, South Korea

Young Ju Lee