Skhynix Inc.

Hynix Semiconductor Inc.

Hanon Systems

Young Ju Kim

Dong Uk Lee

Sung Jin Kim

Seok Koo Kim

Young In Kim

Boo Yong Um

Chan Young Lee

Su Jeong Sim

Kwan Weon Kim

Sang Hoon Shin

Jae O Jung

Byeong Ha Lee

Seung Hak Hue

A vehicular air conditioning system and a control method thereof are provided. The vehicular air conditioning system includes: a plurality of mode doors configured to switch an air discharge mode in a passenger compartment, the mode doors including a defogging door, a vent door and a floor door; and a mode door air pressure reduction part configured to temporarily reduce an air pressure acting on at least one of the mode doors when the air discharge mode is switched.

Vehicular air conditioning system and control method thereof

The present invention relates to an air conditioner for a vehicle, in which a means for fixing a cable connecting device is disposed integrally with an air-conditioning case, thereby having an optimized installation location, keeping rigidity, achieving weight lightening, and enhancing assemblability. The air conditioner is to condition air in the interior of the vehicle by heating or cooling indoor air, and includes: a cable connecting device for connecting an actuating means of a controller of the vehicle to actuate a door inside an air-conditioning case with an actuating means of the air-conditioning case by a cable; and a cable fixing part for fixing the cable connecting device to the air-conditioning case.

Air conditioner for vehicle

A test circuit includes a through via test unit configured to be set to a first resistance value in response to a first test control signal and to a second resistance value in response to the first test control signal and a second test control signal, and form a current path including a through via that electrically connects a first chip and a second chip; and a test measurement unit configured to supply a test voltage to the through via and measure a current flowing through the through via.

Test circuit and semiconductor apparatus including the same

An address input circuit of a semiconductor device includes: an address latch unit configured to generate latch addresses, by latching addresses sequentially provided by an external, according to a command decoding signal, wherein latch timings of each of the addresses are adjusted differently from one another; and a command decoder configured to decode a command provided from the external and generate the command decoding signal.

Address input circuit of semiconductor apparatus

A semiconductor apparatus includes a memory chip which includes: a memory area; a data input/output block configured to communicate with the memory area; and a data transmission/reception block configured to connect one of a plurality of channels and a pad to the data input/output block, wherein the plurality of channels are configured to input and output normal data to and from another chip, and the pad is configured to input and output test data.

Semiconductor apparatus

Disclosed is an input circuit of a semiconductor memory apparatus. The input circuit includes a first buffer and a second buffer. The first buffer has an input terminal connected with a first input pin for receiving a control signal used in a multi-control mode for controlling an entire memory area by dividing the entire memory area, and an output terminal having a first level according to a control mode signal. The second buffer has an input terminal connected with a second input pin for receiving one of plural signals used in a single control mode for controlling the entire memory area without dividing the entire memory area, and an output terminal having a second level according to the control mode signal.

Input circuit of semiconductor memory apparatus and controlling method thereof

A semiconductor memory device with a mirror function enables two memory devices such as two DRAMs to share the same address and control signals. A pair of semiconductor memory devices are mounted on both sides of a substrate to be symmetrical to each other. A mirror function transfers a first transmission signal and a second transmission signal input on respective pads to any one of a mirror 'on' path and a mirror 'off' path. The mirror function can vary or reduce path delay differences between the mirror function &#x201c;on&#x201d; path and the mirror function &#x201c;off&#x201d; path by means of the delay and the mixture of phases in the semiconductor memory device, and reduce skew occurred in the operation of the mirror function.

Growing community of inventors

Icheon-si, South Korea

Young Ju Kim