Samsung Electronics Co., Ltd.

Solarsys Co., Ltd.

Young-Jin Kwon

Jaegoo Lee

Geun Won Lim

Jun Hyoung Kim

Youngwoo Park

Jaeduk Lee

Jintaek Park

Seung-joon Yang

Yoocheol Shin

Dohyun Lee

Dong Seog Eun

Ho Jin Kim

Gi Yong Chung

Kwang-Yol Kay

Kang-Jin Kim

Jong-Hyung Kim

A semiconductor device, in which a cell array region and an extension region are arranged along a first direction, and in which contact regions and through regions are alternately arranged along the first direction in the extension region, including: a mold structure including a plurality of first insulating patterns and a plurality of gate electrodes, which are alternately stacked on a first substrate; a channel structure penetrating the mold structure in the cell array region to intersect the plurality of gate electrodes; respective gate contacts that are on the mold structure in the contact regions and are connected to each of the gate electrodes; and a plurality of second insulating patterns, the second insulating patterns being stacked alternately with the first insulating patterns in the mold structure in the through regions, the plurality of second insulating patterns including a different material from the plurality of first insulating patterns.

Method of fabricating a semiconductor memory device including an extension gate cutting region

Semiconductor device including a cell array region and an extension region

A nonvolatile memory device includes a substrate including a cell array region, a first gate electrode including an opening on the cell array region of the substrate, a plurality of second gate electrodes stacked above the first gate electrode and including convex portions having an outward curve extending toward the substrate, and a word line cutting region cutting the opening and the convex portions.

Nonvolatile memory device

A semiconductor device includes a lower stack structure including lower gate electrodes and lower insulating layers that are alternately and repeatedly stacked on a substrate. The semiconductor device includes an upper stack structure including upper gate electrodes and upper insulating layers that are alternately and repeatedly stacked on the lower stack structure. A lower channel structure penetrates the lower stack structure. An upper channel structure penetrates and is connected to the upper stack structure. A lower vertical insulator is disposed between the lower stack structure and the lower channel structure. The lower channel structure includes a first vertical semiconductor pattern connected to the substrate, and a first connecting semiconductor pattern disposed on the first vertical semiconductor pattern. The upper channel structure includes a second vertical semiconductor pattern electrically connected to the first vertical semiconductor pattern with the first connecting semiconductor pattern disposed therebetween.

Semiconductor device and method of manufacturing the semiconductor device

A semiconductor device is provided as follows. A peripheral circuit structure is disposed on a first substrate. A cell array structure is disposed on the peripheral circuit structure. A second substrate is interposed between the peripheral circuit structure and the cell array structure. The cell array structure includes a stacked structure, a through hole and a vertical semiconductor pattern. The stacked structure includes gate electrodes stacked on the second substrate. The through hole penetrates the stacked structure and the second substrate to expose the peripheral circuit structure. The vertical semiconductor pattern is disposed on the peripheral circuit structure, filling the through hole.

Semiconductor device and method of fabricating the same

The present invention relates to a dye for a dye-sensitized solar cell. The dye according to the present invention has a high degree of light absorbency and can improve the photoelectric current conversion efficiency when employed in a light-absorbing layer for a solar cell. Chemical Formula 1 illustrates the present invention. wherein X, X, N, Z, and Aare described herein.

Dye for a dye-sensitised solar cell, and a solar cell comprising the same

An apparatus to suppress artifacts in an image signal. The apparatus includes a differential value calculation unit to calculate a differential value between adjacent pixels with respect to an input image signal, a diffusion amount calculation unit to calculate an amount of diffusion between the adjacent pixels on the basis of the differential value calculated by the differential value calculation unit, and a pixel value conversion unit to convert the present pixel value of the image signal inputted on the basis of the diffusion amount between the pixels calculated by the diffusion amount calculation unit. The apparatus changes the pixel value in consideration of the differential value between the adjacent pixels, and thus it can provide a high quality image signal without losing or misrecognizing the artifacts of the image signal.

Apparatus to suppress artifacts of an image signal and method thereof

An apparatus and method of processing shoot artifacts of an image signal includes a maximum gradient value calculation part to set a window of a predetermined size based on a current pixel of an input image signal and to calculate a maximum gradient value based on values of pixels in the window, a limit value calculation part to calculate a limit value corresponding to the maximum gradient value, a dilation amount calculation part to calculate a dilation amount corresponding to the current pixel based on the calculated limit value and a pixel difference between the current pixel neighboring pixels of the current pixel, and a pixel value conversion part to add a current pixel value to a value obtained by multiplying the calculated dilation amount by a predetermined gain value.

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Seoul, South Korea

Young-Jin Kwon