Samsung Electronics Co., Ltd.

Young-Jee Yoon

Chung-Sam Jun

Jung-Taek Lim

Sung-Hong Park

Yu-sin Yang

Tae-Sung Kim

Chung-sam Jun

Sang-kil Lee

Dong-Chun Lee

Min-Kook Kim

Yoo-Seok Jang

Bang-Won Kim

Woo-Seok Ko

An apparatus and method of forming an epitaxial layer are provided. The apparatus includes a process chamber in which an epitaxial process is performed to form epitaxial layer on a substrate. A first supplier supplies source gases for the epitaxial layer into the process chamber. A second supplier supplies dopants into the process chamber. A detector detects a composition ratio of the epitaxial layer and a concentration of the dopants in the epitaxial layer during the epitaxial growth process. And a controller controls a mass flow of at least one of the source gases and a mass flow of the dopants in-line with the epitaxial growth process. Accordingly, the layer thickness of the epitaxial layer can be accurately controlled in real time in line with the epitaxial process.

Apparatus for forming a thin layer and method of forming a thin layer on a substrate using the same

In an embodiment of a method of inspecting a substrate, the substrate on which minute structures are formed is divided into a plurality of inspection regions. A main inspection region among the inspection regions is selected. A main image of the main inspection region and sub-images of sub-inspection regions adjacent to the main inspection region are obtained. An average image of the main image and the sub-images is obtained. The average image is then compared with the main image to detect defects in the main inspection region. Gray levels may be used. The average image may have improved quality so that the defects in the selected inspection region may be rapidly and accurately detected. This process has an improved reliability. Further, the number of inspecting processes for the substrate may be reduced. And a line for the inspection process may be automated so that a worker-free line may be established.

Method and apparatus for inspecting a substrate

A surface inspection apparatus and method increase wafer productivity, wherein to increase an efficiency of the surface inspection apparatus to detect defects during a scanning of the wafer surface, a scanning speed for a subsequent defect detection is varied according to an increase/decrease of defect density represented on a plurality of images acquired successively. When the density of defects is reduced, the scanning speed increases and a level of a skip rule increases, and when the density of defects increases, the scanning speed decreases and a level of the skip rule decreases to precisely detect defects, thereby increasing reliability, throughput, and productivity.

Apparatus and method for inspecting a surface of a wafer

In an embodiment, a method of scanning a substrate, and a method and an apparatus for analyzing crystal characteristics are disclosed. A sequential scan on the scan areas using a first electron beam and a second electron beam are repeatedly performed. The electrons accumulated in the scan areas by the first electron beam are removed from the scan areas by the second electron beam. When a size of the scan area is substantially the same as a spot size of the first electron beam, adjacent scan areas partially overlap each other. When each of the scan areas is larger than a spot size of the first electron beam, the adjacent scan areas do not overlap each other. Images of the scan areas are generated using back-scattered electrons emitted from each of the scan areas by irradiating the first electron beam to analyze crystal characteristics of circuit patterns on the substrate.

Method of scanning a substrate, and method and apparatus for analyzing crystal characteristics

In the methods of compensating for an alignment error during fabrication of structures on semiconductor substrates, a conductive pattern structure is formed at a first position on a first semiconductor substrate. The conductive pattern structure includes a grid of first and second conductive patterns arranged as columns and intersecting rows with openings bounded therebetween. A first conductive contact structure overlaps the conductive pattern structure, and includes a plurality of spaced apart conductive contacts arranged as a grid of rows and columns that can be tilted at a non-zero angle relative to the grid of the conductive pattern structure. A determination is made as to whether the first conductive contact structure is electrically connected to the conductive pattern structure. A second conductive contact structure is formed at a position on a second semiconductor substrate that is determined in response to the determination of whether the first conductive contact structure is electrically connected to the conductive pattern structure.

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Gyeonggi-do, South Korea

Young-Jee Yoon