Samsung Electronics Co., Ltd.

Skhynix Inc.

Sk Siltron Co., Ltd.

Lg Siltron Incorporated

Young-Jae Choi

Hyuk Kang

Myeong-Jae Park

Kye-Jin Lee

Jung-Hyun Eum

Ho-Jun Lee

Jun-Hak Lim

Chung-Hyun Lee

Tae-Ho Kim

Kyung-Whan Kim

Jong-Chern Lee

Jae-Ho Song

Gyu-Cheol Choi

Dong-Kun Lee

Tae-Gun Park

In-Ji Jin

Su-Hyun Kim

Dug-dong Kang

Chang-gyu Hwang

Joo-young Yoon

Woo-Taek Song

Ju-Ah Lee

Kwang-Yong Choi

Seok-Woo Choi

Ki-man Han

Hee-Bae Park

An electronic device and method are disclosed herein. The electronic device includes a display, a memory and a processor. The processor implements the method, including displaying a first image through the display, storing screen information associated with the first image in a memory, detecting whether the electronic device is mounted on the wearable device, generating a second image corresponding to a view point of the first image based on the stored screen information, and displaying the generated second image through the display.

Electronic device and method for displaying image

A memory device includes: a plurality of first control signal interfaces respectively corresponding to a plurality of channels, and suitable for receiving control signals from a host; a plurality of first data interfaces respectively corresponding to the plurality of channels, and suitable for exchanging data and data strobe signals with the host; a second control signal interface suitable for receiving control signals through a selected one of the first control signal interfaces and a selected one of the channels and outputting the received control signals, in a monitoring mode; and a second data interface suitable for receiving a part of the data and data strobe signals exchanged through a selected one of the first data interfaces and the selected channel, and outputting the received part of the data and data strobe signals, in the monitoring mode.

Memory device and memory system including the same

A memory device includes: a plurality of data pads; a data distribution circuit suitable for distributing data received through some data pads of the plurality of data pads to a first data bus, and distributing data received through the other data pads to a second data bus, in a first mode; a first channel region suitable for storing data obtained by copying the data of the first data bus at a predetermined ratio of 1:N where N is an integer equal to or more than 2; and a second channel region suitable for storing data obtained by copying the data of the second data bus at the predetermined ratio of 1:N.

Memory device

An electronic device for transmitting configuration information and an operation method thereof are provided. In various embodiments, an electronic device may receive a signal including information related to a media device, from the media device. The electronic device may identify configuration information usable for setting a configuration of the media device, in response to the signal. A level (such a security level or a priority level) of the configuration information may be identified. It may then be determined whether it is permissible for the configuration information to be transmitted to the media device, based on the identified level of the configuration information. If so, the configuration information may be transmitted to the media device.

Electronic device employing level-based transmission of configuration information

A clock monitoring circuit includes: a sampling circuit suitable for sampling a monitoring target clock in synchronization with a sampling clock; a first counter circuit suitable for counting the number of times that the sampling circuit samples the monitoring target clock at a predetermined level; and a second counter circuit suitable for counting the number of times that the sampling circuit performs sampling.

Clock monitoring circuit

Provided is a semiconductor substrate including a growth substrate, one or more compound semiconductor layers disposed on the growth substrate, and one or more control layers disposed between the compound semiconductor layers. Each control layer includes multiple nitride semiconductor layers including at least Al.

Semiconductor substrate for controlling a strain

A method of performing a connection between electronic devices and an electronic device thereof. The method may include: receiving a first signal including first information of the media device through first communication mode; generating a second signal including identification information of the media device by using at least a part of the first information in response to the first signal; transmitting the second signal to the media device through the first communication mode; and performing a connection with the media device by using the first information.

Method and electronic device for performing connection between electronic devices

Provided is a semiconductor substrate including a seed layer disposed on a substrate, a buffer layer disposed on the seed layer, a plurality of nitride semiconductor layers disposed on the buffer layer, and at least one stress control layer between the plurality of nitride semiconductor layers. The buffer layer includes a plurality of step regions and at least one heterogeneous region. The plurality of step regions includes the same nitride semiconductor material. The heterogeneous region includes a different nitride semiconductor material from the step regions.

Semiconductor substrate

Disclosed herein is a stacked memory device including a base die and a plurality of core dies stacked using a plurality of through-chip electrodes. Each of the core dies may include a plurality of input pads capable of receiving addresses externally in a wafer-level test mode; a control signal generation unit capable of decoding the addresses received through the input pads to generate a first control signal; an address generation unit capable of generating a first address based on the addresses received through the input pads; and a signal selection unit capable of selecting one of the first control signal and a second control signal received from the base die through a corresponding through-chip electrode to output a global control signal, and selecting one of the first address and a second address received from the base die through a corresponding through-chip electrode to output a global address.

Stacked memory device and semiconductor memory system including the same

A method for manufacturing first electrode of a capacitor of a semiconductor device is disclosed. After forming a polycrystalline layer composed of grains with microscopic structure to include an impurity in them, the polycrystalline layer is etched to cut the boundary portions of the grains, thereby allowing the surface of the polycrystalline layer to be rugged. The micro-trenches or micro-pillars are formed by using the oxide layer or an anisotropic etching after exposing the surface of the first rugged polycrystalline layer, and epitaxial grains are formed by epitaxial growth, so that cell capacitance can be further increased. The simple process allows the formation of a reliable semiconductor device having regularity and reproducibility, and capable of increasing and adjusting the cell capacitance easily.

Method for manufacturing a capacitor of a semiconductor device

Growing community of inventors

Gyeonggi-do, South Korea

Young-Jae Choi