Advanced Micro Devices Corporation

Qualcomm Incorporated

Young In Yeo

Vineet Goel

Ruijin Wu

Skyler Jonathon Saleh

Christopher Jude Brennan

Tao Wang

Todd Martin

Anirudh Rajendra Acharya

Gang Zhong

Chunhui Mei

Juraj Obert

Usame Ceylan

Sagar Shankar Bhandare

Martin G Sarov

A processor dynamically selects a render mode for each render pass of a frame based on the characteristics of the render pass. A software driver of the processor receives graphics operations from an application executing at the processor and converts the graphics operations into a command stream that is provided to the graphics pipeline. As the driver converts the graphics operations into the command stream, the driver analyzes each render pass of the frame to determine characteristics of the render passes, and selects a render mode for each render pass based on the characteristics of the render pass.

Graphics processing unit render mode selection system

Systems and methods related to priority-based and performance-based selection of a render mode, such as a two-level binning mode, in which to execute workloads with a graphics processing unit (GPU) of a system are provided. A user mode driver (UMD) or kernel mode driver (KMD) executed at a central processing unit (CPU) configures low and medium priority workloads to be executed in a two-level binning mode and selects a binning mode for high priority workloads based on whether performance heuristics indicate that one or more binning conditions or override conditions have been met. High priority workloads are maintained in a high priority queue, while low and medium priority workloads are maintained in a low/medium priority queue, such that execution of low and medium priority workloads at the GPU can be preempted in favor of executing high priority workloads.

Processing system with selective priority-based two-level binning

A technique for performing ray tracing operations is provided. The technique includes receiving a ray for an intersection test, testing the ray against boxes specified in a bounding volume hierarchy to eliminate one or more boxes or triangles from consideration, unpacking a triangle from a compressed triangle block of the bounding volume hierarchy, the compressed triangle block including two or more triangles that share at least one vertex, and testing the ray for intersection against at least one of the unpacked triangles.

Bounding volume hierarchy compression

Described herein are techniques for improving the effectiveness of depth culling. In a first technique, a binner is used to sort primitives into depth bins. Each depth bin covers a range of depths. The binner transmits the depth bins to the screen space pipeline for processing in near-to-far order. Processing the near bins first results in the depth buffer being updated, allowing fragments for the primitives in the farther bins to be culled more aggressively than if the depth binning did not occur. In a second technique, a buffer is used to initiate two-pass processing through the screen space pipeline. In the first pass, primitives are sent down to update the depth block and are then culled. The fragments are processed normally in the second pass, with the benefit of the updated depth values.

Method and system for depth pre-processing and geometry sorting using binning hardware

Techniques for performing ray tracing operations are provided. The techniques include identifying bounding-box-surface-area-weighted centroid of a group of primitives associated with a bounding box of a bounding volume hierarchy ('BVH'); generating candidate splits at the centroid, the candidate splits defining geometry subgroups; identifying a candidate split having a lowest surface area bounding box; and generating nodes for the BVH that include geometry of the geometry subgroups of the identified candidate split.

Bounding volume hierarchy generation

A compute unit accesses a chunk of bits that represent indices of vertices of a graphics primitive. The compute unit sets values of a first bit to indicate whether the chunk is monotonic or ordinary, second bits to define an offset that is determined based on values of indices in the chunk, and sets of third bits that determine values of the indices in the chunk based on the offset defined by the second bits. The compute unit writes a compressed chunk represented by the first bit, the second bits, and the sets of third bits to a memory. The compressed chunk is decompressed and the decompressed indices are written to an index buffer. In some embodiments, the indices are decompressed based on metadata that includes offsets that are determined based on values of the indices and bitfields that indicate characteristics of the indices.

Compression and decompression of indices in a graphics pipeline

Techniques are described for stereoscopic view generation. A graphics processing unit (GPU) may combine attribute information for two or more corresponding vertices of corresponding primitives in different views. The GPU may process the combined attributed information to generate graphics data for the stereoscopic view.

Stereoscopic view processing

In an example, a method for rendering a 3-D scene of graphical data into a 2-D scene may include dividing 2-D space used to represent the 3-D scene from a viewpoint into a plurality of tiles. The 3-D scene may include a plurality of primitives. The method may include generating visibility information for a first tile of the plurality of tiles. The method may include modifying the visibility information for the first tile to generate modified visibility information for the first tile. The method may include generating the 2-D scene using the modified visibility information for the first tile.

Visibility information modification

Techniques are described for stochastic rasterization. A graphics processing unit (GPU) may discard samples of bounding polygons that together indicate movement of one or more primitives before a pixel shader process the samples. The GPU may leverage a stencil buffer and stencil test for discarding of such samples.

Stochastic rasterization using enhanced stencil operations on a graphics processing unit (GPU)

This disclosure describes techniques for rendering a plurality of primitives that includes at least two different types of primitives during the execution of a single draw call command. This disclosure also describes techniques for rendering a plurality of primitives using tessellation domains of different tessellation domain types during the execution of a single draw call command. The techniques of this disclosure may, in some examples, reduce the complexity and processing overhead for user applications, reduce the number of times that the rendering state of the graphics rendering pipeline needs to be switched during the drawing of a graphics scene, and/or reduce the number of times that shader programs need to be reloaded into different processing stages of a graphics pipeline during the rendering of a graphics scene.

Growing community of inventors

San Diego, CA, United States of America

Young In Yeo