Samsung Electro-Mechanics Co., Ltd.

Lg Chem, Ltd

Korea E & S Co., Ltd.

Young Hwan Shin

Jong Jin Lee

Jae Won Jung

Yoon Su Kim

Jae Min Choi

Yong Hwan Kim

Soon Jin Cho

Keon Yang Park

Dong Kyu Lee

Tae Gon Lee

Jin Seok Lee

Ja Ho Koo

Hyung Gi Ha

Ey Yong Kim

Chong Ho Kim

Jong Yong Kim

Kyoung Ro Yoon

Dong Won Kim

Dong Yeon Shin

Hyoung Seok Kim

Byoung Chan Kim

Kwang Jin Jeong

Seon Ha Kang

Chang Yul Oh

Byung Kook Sun

Hyo Soo Lee

Dong Kuk Kim

Chin Kwan Kim

Jae Heun Joung

Kui Won Kang

Hun Young Lee

Seok Kwang Hong

Chung Woo Cho

Se Meyung Hwang

A sublimation purification apparatus that includes a vacuum chamber; a tube housing positioned in the vacuum chamber; a boat in close contact with the tube housing; and heating units positioned adjacent to an outer surface of the boat and an outer surface of the tube housing, respectively, wherein a sublimation purification target material is contained in the boat, and at least one of the boat and the tube housing is formed of a metal.

Sublimation purification apparatus and sublimation purification method

Disclosed herein are a printed circuit board and a method for manufacturing the same. The printed circuit board includes: a base substrate having a metal pattern for a circuit; and a surface roughness provided on the metal pattern, wherein the surface roughness has a first surface roughness in an anchor structure and a second surface roughness having a black oxide layer in a granular structure formed on the first surface roughness.

Printed circuit board and method for manufacturing the same

Disclosed herein are a printed circuit board and a method for manufacturing the same. The printed circuit board includes: a base substrate having a metal pattern for a circuit; and a surface roughness provided on the metal pattern, wherein the surface roughness has a first surface roughness in an anchor structure and a second surface roughness having a black oxide layer in a needle structure formed on the first surface roughness.

A method of manufacturing a flip chip package includes: providing a board including a conductive pad disposed inside a mounting region of the board on which the electronic device is to be mounted, and a connection pad disposed outside the mounting region; forming a resin layer on the board; forming a trench by removing a part of the resin layer or forming an uneven portion at a portion of a surface of the resin layer; forming, on the trench or uneven portion, a dam member preventing leakage of an underfill between the mounting region and the connection pad; and mounting the electronic device on the mounting region.

Method of manufacturing flip chip package

There is provided a flip chip package including an electronic device, a board including a conductive pad disposed inside a mounting region of the board on which the electronic device is mounted, and a connection pad disposed outside the mounting region, a resin layer formed on the board and including a trench formed by removing a part of the resin layer, and a dam member provided on the trench and preventing the leakage of an underfill between the mounting region and the connection pad. Since the dam member, formed on the processed resin layer, can prevent the leakage of the underfill, a package defect rate can be lowered, and connection reliability can be improved.

Flip chip package and method of manufacturing the same

Disclosed herein is a printed circuit board. The printed circuit board includes a base substrate including a first region on which a semiconductor chip is mounted and a second region positioned outside the first region, first insulating patterns covering the base substrate and including trenches formed on the second region, and second insulating patterns protruding from the first insulating patterns on the second region. The trench and the second insulating pattern may be used as a structure defining an underfill forming material in a preset shape during the process of forming an underfill.

Printed circuit board and semiconductor package with the same

A method for fabricating a semiconductor package substrate, including: preparing a copper clad laminate and half etching a copper foil on a wire bonding pad side of the copper clad laminate; depositing a first etching resist on the opposite sides of the copper clad laminate; forming circuit patterns on the first etching resist, constructing circuits including a wire bonding pad and a ball pad after the model of the circuit patterns, and removing the first etching resist; applying a solder resist to the copper clad laminate in such a way to expose the wire bonding pad and the ball pad; and plating the wire bonding pad with gold and subjecting the ball pad to surface treatment.

Method for fabricating semiconductor package substrate having different thicknesses between wire bonding pad and ball pad

The present invention relates to a method for manufacturing a printed circuit board and an apparatus for manufacturing the same; and, more particularly, to a method for manufacturing a printed circuit board and an apparatus for manufacturing the same capable of improving the degree of matching between contact holes and pads by correcting exposure position data of an exposing process for forming the pads according to positions of the contact holes.

Manufacturing method of printed circuit board and manufacturing apparatus for the same

Disclosed herein is a method of manufacturing a copper-clad laminate for Via-On-Pad application. The pad includes the steps of providing a first copper foil layer and a second copper foil layer, on the first surfaces of which protective layers are formed; placing two sets of a first copper foil layer, an insulating layer and a second copper foil layer above and below an adhesive layer, respectively; removing the protective layers, which have been respectively formed on the second copper foil layers, and parts of the second copper foil layers; forming via holes by removing parts of the insulating layers through the regions from which the parts of the second copper foil layers have been removed, using laser processing; and forming two copper-clad laminates by removing the protective layers, which have been respectively formed on one surface of one first copper foil layer and one surface of the other first copper foil layer, and the adhesive layer.

Method of manufacturing copper-clad laminate for VOP application

Disclosed herein are a semiconductor package substrate and a method for fabricating the same. In the semiconductor package substrate, the circuit layer of the wire bonding pad side differs in thickness from that of the ball pad side to which a half etching process is applied. In addition, a connection through hole is constructed to provide an electrical connection between the plating lead lines on the wire bonding pad side and the ball pad side, thereby preventing electrical disconnection when the plating lead line of the wire bonding pad side is cut.

Semiconductor package substrate having different thicknesses between wire bonding pad and ball pad and method for fabricating the same

A via hole having a fine hole land includes a first conductive layer formed on an inner wall of the via hole, the first conductive layer being in contact with a hole formed in an insulation layer and extendedly projected to the outside and having the same diameter as the hole in the insulation layer; a second conductive layer contacted with the first conductive layer and formed on an inner wall thereof and projected to the outside and having the same height as the first conductive layer; and a circuit line, formed on the insulation layer, to connect the first conductive layer extendedly projected to the outside of hole in the insulation layer, where the second conductive layer has the same height as the first conductive layer and the fine hole land is connected to wire bonding pad or solder ball pad through the circuit line.

Via hole having fine hole land and method for forming the same

Disclosed is a ball grid array (BGA) package substrate, in which a wire bonding pad and a solder ball pad are formed on a via hole, making high freedom in design of a circuit pattern and a high density circuit pattern possible, and a method of fabricating the same.

BGA package substrate and method of fabricating same

A method is directed towards fabricating a printed circuit board (PCB) having a thin core layer. In the method, a substrate, where a copper foil is formed on a release film and a prepreg, is employed as a base substrate and a core insulating layer is removed after the fabrication of the PCB, thereby reducing the thickness of the final product.

Method of fabricating printed circuit board having thin core layer

A method for manufacturing a build-up multi-layer printed circuit board is disclosed in which a YAG laser is used upon the formation of a via hole in the multi-layer printed circuit board, such that it can have the following advantages: the manufacturing process would become simple; the component packaging density and freedom for the design of the board would be improved; and a high speed of signal process would be ensured. The method for manufacturing a build-up multi-layer printed circuit board includes the steps of: forming a first printed circuit pattern on a copper clad laminate (CCL) by applying a general photo-etching process, the CCL having a copper foil on the one face thereof; stacking a resin-coated (on one face) copper foil (RCC) on the CCL with the first printed circuit pattern formed thereon, and heating and pressing this structure; irradiating a YAG laser to the board with said RCC stacked so as to form a via hole at a predetermined position by removing said RCC; carrying out an electroless and electro copper plating on the board with the via hole formed therein to form a plated layer; and forming a second printed circuit pattern on said plated layer to electrically connect the layers on which the first and second printed circuit patterns are formed.

Method for manufacturing build-up multi-layer printed circuit board by using yag laser

A method for manufacturing a build-up multi-layer printed circuit board is disclosed which is used in the mother board of a computer, camera-incorporated VTRs, MCMs (multi chip module), CSPs (chip size package) or portable phones. In the build-up multi-layer printed circuit board of the present invention, an inner-layer connecting state is improved. The multi-layer printed circuit board is manufactured by sequentially stacking insulating resin layers and circuit conductor layers based on a build-up method. That is, a first insulating resin layer is necessarily made to undergo an exposure and a development so as to form a first via hole 122. Then a second via hole 124 which is larger than the first via hole 122 is formed on a second insulating resin layer, thereby forming a final V shaped photo via hole 120. Thus build-up multi-layer printed circuit board is manufactured.

Growing community of inventors

Daejeon, South Korea

Young Hwan Shin