Samsung Electronics Co., Ltd.

Ips Corporation

Snu Rdb Foundation

Young-Hoon Park

Jae-Ho Song

Sang-il Jung

Won-je Park

Ui-Sik Kim

Tae-Seok Oh

Dae-cheol Seong

Won-Je Park

Yeo-Ju Yoon

Jeong-Ho Lee

Jin-ho Kim

Chan Jae Park

Jun-Seok Yang

June-Taeg Lee

Jong-wook Hong

Keo-sung Park

Eun-soo Kim

Sang-Hak Shin

Bo-Bae Kang

Myoung-Hee Han

Jin-Hyeong Park

Min-young Jung

An-Chul Shin

Sung-Ho Choi

Beom-Sik Bae

Kyung-Joo Suh

Young-Kyo Baek

Jung-Ho Park

Sang-Soo Jeong

Hyun-Ju Lee

Bum-Suk Kim

Duck-Hyung Lee

Kyung-seok Oh

Ju-Wan Kim

Seung-Woo Seo

Sung-Won Doh

Hyo-Dong Ban

Yang-koo Lee

Jeong-Hoon Bae

Jae-Ku Lee

Ju-bum Lee

Won-Hee Jang

Eun-Young Minn

Weon-cheol Hong

Bo-Bae Keang

Won-jeong Lee

Pu-ra Kim

Dong-Hyun Je

Yu-Jin Ahn

Sang-II Jung

Eun-Young Min

Jin-Hun Lee

Eun-young Min

An image sensor includes a substrate having a front side and a back side, an insulating structure containing circuits on the front side of the substrate, contact holes extending through the substrate to the circuits, respectively, and a plurality of pads disposed on the backside of the substrate, electrically connected to the circuits along conductive paths extending through the contact holes, and located directly over the circuits, respectively. The image sensor is fabricated by a process in which a conductive layer is formed on the back side of the substrate and patterned to form the pads directly over the circuits.

Image sensor and method of fabricating the same

Provided is a method for managing a group key in a key distribution center. The method includes: receiving a key request from a mobile device; generating a private key for the mobile device using information about a withdrawal time included in the key request; generating a public key and a verification key for the mobile device; and transmitting at least one key including the generated key to the mobile device.

Method and apparatus for managing group key for mobile device

An image sensor having a sensor array area, a circuit area around the sensor array area, and a pad area adjacent to the circuit area includes a substrate, a multi-layer wiring structure including a plurality of wiring layers on a first surface of the substrate in the circuit area, at least one well in the substrate in the circuit area, and metal wiring that extends on a second surface of the substrate opposite to the first surface, from the pad area to the circuit area, and extends from the second surface into contacts with the at least one well.

Image sensor

A method of fabricating an image sensor may include providing a substrate including light-receiving and non-light-receiving regions; forming a plurality of gates on the non-light-receiving region; ion-implanting a first-conductivity-type dopant into the light-receiving region to form a first dopant region of a pinned photodiode; primarily ion-implanting a second-conductivity-type dopant, different from the first-conductivity-type dopant, into an entire surface of the substrate, using the gates as a first mask; forming spacers on both side walls of the gates; and secondarily ion-implanting the second-conductivity-type dopant into the entire surface of the substrate, using the plurality of gates including the spacers as a second mask, to complete a second dopant region of the pinned photodiode. An image sensor may include the substrate; a transfer gate formed on the non-light-receiving region; a first dopant region in the light-receiving region; and a second dopant region formed on a surface of the light-receiving region.

Image sensors with lightly doped drain (LDD) to reduce dark current

In a method of manufacturing a CMOS image sensor, a P type epitaxial layer is formed on an N type substrate. A deep Ptype well layer is formed in the P type epitaxial layer. An N type deep guardring well is formed in a photodiode guardring region. The N type deep guardring region makes contact with the N type substrate and also be connected with an operational voltage terminal. A triple well is formed in a photodiode region and a peripheral circuit region. The triple well is used for forming a PMOS and an NMOS having different operational voltages. An isolation region is formed in the photodiode region. The isolation region in the photodiode region has a depth different from a depth of an isolation region in the peripheral circuit region.

CMOS image sensor having a crosstalk prevention structure and method of manufacturing the same

A method of fabricating a metal interconnection and a method of fabricating image sensor using the same are provided. The method of fabricating a metal interconnection including forming a interlayer dielectric layer on a substrate, forming an interconnection formation region in the interlayer dielectric layer, performing an ultraviolet (UV) treatment on the substrate after the interconnection formation region is formed and forming a metal interconnection in the interconnection formation region.

Method of fabricating metal interconnection and method of fabricating image sensor using the same

Complementary metal-oxide semiconductor (CMOS) image sensors (CIS) and methods of manufacturing the same are provided, the sensors include an epitaxial layer on a substrate in which a first, second, third and fourth region are defined. A photodiode may be formed at an upper portion of the epitaxial layer in the first region. A plurality of gate structures may be formed on the epitaxial layer in the second, third and fourth regions. A first blocking layer may be formed on the gate structures and the epitaxial layer in the first and second regions. A first impurity layer may be formed at an upper portion of the epitaxial layer adjacent to the gate structures in the second region, and a second impurity layer at upper portions of the epitaxial layer adjacent to the gate structures in the third and fourth regions. A color filter layer may be formed over the photodiode. A microlens may be formed on the color filter layer.

CMOS image sensors

An image sensor includes an active pixel and a black pixel. The active pixel has a first signal gain and a first dark signal level, and the black pixel has a second signal gain and a second dark signal level. At least one of the first and second signal gains is adjusted such that the first and second dark signal levels are substantially equal for minimizing image defects in the image sensor.

Image sensor with adjusted gains in active and black pixels

CMOS image sensor having a crosstalk prevention structure

An image sensor includes a logic region and an APS region having a first gate electrode, a photo-detector, a first protecting layer, first spacers, and a second protecting layer. The first gate electrode is formed over a semiconductor substrate. The photo-detector is formed to a side of the first gate electrode within the semiconductor substrate. The first protecting layer is formed over the first gate electrode and the photo-detector. The first spacers are formed over the first protecting layer to the sides of the first gate electrode. The second protecting layer is formed over the first protecting layer and the spacers. The first and second protecting layers are for preventing a contaminant from reaching the photo-detector.

CMOS image sensor with photo-detector protecting layers

Disclosed is a image sensor (e.g., a CMOS image sensor) including pixels each having a transfer transistor and a drive transistor, in which the gate of at least one of the transistors has a boosting gate disposed over it comprised of a conductive film pattern with interposing an insulation film. Thus, a voltage applied to the boosting gate is capacitively coupled to at least one of the transfer gate of the transfer transistor and a drive gate of the drive transistor. The transfer gate is supplied with the sum of the transfer voltage and the boosting gate-coupling voltage as a result and there is no need for providing a high voltage generator for the image sensor. The dynamic range of operation may be enhanced if such a coupling voltage is applied to the drive gate of the drive transistor.

Image sensor with self-boosting transfer transistor gate and methods of operating and fabricating the same

Example embodiments disclose an image sensor capable of preventing or reducing image lag and a method of manufacturing the same. Example methods may include forming a gate insulating film and a gate conductive film doped with a first-conductive-type dopant on a semiconductor substrate; forming a transfer gate pattern by patterning the gate insulating film and the gate conductive film; and fabricating a transfer gate electrode by forming a first-conductive-type photodiode in the semiconductor substrate adjacent to one region of the transfer gate pattern, by forming a second-conductive-type photodiode on the first-conductive-type photodiode, and by forming a first-conductive-type floating diffusion region in the semiconductor substrate adjacent to the other region of the transfer gate pattern.

Image sensor and method of manufacturing the same

Methods of manufacturing CMOS image sensors

Growing community of inventors

Suwon-si, South Korea

Young-Hoon Park