Qualcomm Incorporated

Young Hoon Kang

Hee Jun Park

Jon James Anderson

Ronald Alton

Meir Tzur

Eran Pinhasov

Joshua Stubbs

Tauseef Kazi

Andrew James Frantz

Christopher L Medrano

Ron Gaizman

Sean Sweeney

Inho Hwang

Yiran Li

Rajat Mittal

R Nicholson Gibson

Mriganka Mondal

Robert Nicholson Gibson

Sumant Madhav Paranjpe

Abhinav Goel

Christoper Lee Medrano

Viswanathan Kumaragurubaran

Inyoung Woo

Andrew J Frantz

Christopher Lee Medrano

Ronald Frank Alton

Joshua Hirsch Stubbs

Systems and techniques are provided for vision perception processing. An example method can include determining an attention demand score or characteristic per region of a frame from a sequence of frames; generating attention votes per region of the frame based on the attention demand score or characteristic per region, the attention votes per region providing attention demands and/or attention requests; determining an attention score or characteristic per region of the frame based on a number of attention votes from one or more computer vision functions; based on the attention score or characteristic per region of the frame, selecting one or more regions of the frame for processing using a neural network; and detecting or tracking one or more objects in the one or more regions of the frame based on processing of the one or more regions using the neural network.

Efficient vision perception

Techniques and systems are provided for machine-learning based image stabilization. In some examples, a system obtains a sequence of frames captured by an image capture device during a period of time, and collects motion sensor measurements calculated by a motion sensor associated with the image capture device based on movement of the image capture device during the period of time. The system generates, using a deep learning network and the motion sensor measurements, parameters for counteracting motions in one or more frames in the sequence of frames, the motions resulting from the movement of the image capture device during the period of time. The system then adjusts the one or more frames in the sequence of frames according to the parameters to generate one or more adjusted frames having a reduction in at least some of the motions in the one or more frames.

Image stabilization using machine learning

Systems, methods, and apparatus are described that enable a physical layer interface of a device coupled to a serial bus to combine two or more single-byte write transactions to obtain a multi-byte write transaction. A method includes buffering a first single-byte transaction addressed to a first register at a first address of a slave device in a first-in-first-out buffer of the physical layer, receiving at the physical layer a second single-byte transaction addressed to a second register at a second address of the slave device coupled to the serial bus, determining in the physical layer whether the second address is incrementally greater than the first address, combining the second single-byte transaction with the first single-byte transaction to obtain a multi-byte transaction, replacing the first single-byte transaction with the multi-byte transaction in the first-in-first-out buffer, and transmitting a sequence of transactions output by the first-in-first-out buffer over the serial bus.

Forced compression of single I2C writes

Systems, methods, and computer programs are disclosed for reducing leakage power of a system on chip (SoC). One such method comprises monitoring a plurality of temperature differentials across a respective plurality of thermoelectric coolers on a system on chip (SoC). Each of the thermoelectric coolers is dedicated to a corresponding one of a plurality of chip sections on the SoC. The thermoelectric coolers are controlled based on the plurality of temperature differentials to minimize a sum of a combined power consumption of the plurality of chip sections and the plurality of corresponding dedicated thermoelectric coolers.

Systems and methods for reducing leakage power of a system on chip with integrated thermoelectric cooling

Various embodiments of methods and systems for energy efficiency aware thermal management in a portable computing device that contains a heterogeneous, multi-processor system on a chip ('SoC') are disclosed. Because individual processing components in a heterogeneous, multi-processor SoC may exhibit different processing efficiencies at a given temperature, energy efficiency aware thermal management techniques that compare performance data of the individual processing components at their measured operating temperatures can be leveraged to optimize quality of service ('QoS') by adjusting the power supplies to, reallocating workloads away from, or transitioning the power mode of, the least energy efficient processing components. In these ways, embodiments of the solution optimize the average amount of power consumed across the SoC to process a MIPS of workload.

Energy efficiency aware thermal management in a multi-processor system on a chip

A method and system for optimizing a core voltage level of a portable computing device ('PCD') and enhancing frequency performance of individual subcomponents are disclosed. A plurality of voltage values is determined for a plurality of subcomponents within the PCD. Next, a reduced set of voltage values may be calculated with a voltage aggregator based on the plurality of voltage values. An optimized voltage level for a shared power domain may then be determined by a voltage optimizer within the PCD from the reduced set of voltage values. A shared power domain may then be set to the optimized voltage level. Subsequently, an operating frequency of each subcomponent may be optimized with a frequency performance enhancer based on the optimized voltage level. An optimal power collapse duration may also be calculated by the frequency performance enhancer and set for each subcomponent from the optimal frequency.

Method and system for optimizing a core voltage level and enhancing frequency performance of individual subcomponents for reducing power consumption within a PCD

Energy efficiency aware thermal management in a multi-processor system on a chip based on monitored processing component current draw

A method and system for optimizing a core voltage level of a portable computing device ('PCD') and enhancing frequency performance of individual subcomponents are disclosed. A plurality of voltage values for a plurality of subsystems is determined. At least one subsystem is a multiplexed subsystem. Next, a reduced set of voltage values is calculated based on the plurality of voltage values and an optimized voltage level is determined for a shared power domain. The shared power domain is subsequently set to the optimized voltage level. If the optimized voltage level is determined to exceed a required voltage level for the at least one multiplexed subsystem when it is running the plurality of processing engines, a subset of the plurality of processing engines may be identified to process a workload of the multiplexed system at a more efficient level of power consumption than the full plurality of processing engines.

Systems, methods, and computer programs are disclosed for minimizing power consumption in graphics frame processing. One such method comprises: initiating graphics frame processing to be cooperatively performed by a central processing unit (CPU) and a graphics processing unit (GPU); receiving CPU activity data and GPU activity data; determining a set of available dynamic clock and voltage/frequency scaling (DCVS) levels for the GPU and the CPU; and selecting from the set of available DCVS levels an optimal combination of a GPU DCVS level and a CPU DCVS level, based on the CPU and GPU activity data, which minimizes a combined power consumption of the CPU and the GPU during the graphics frame processing.

CPU/GPU DCVS co-optimization for reducing power consumption in graphics frame processing

Growing community of inventors

San Diego, CA, United States of America

Young Hoon Kang