Skhynix Inc.

Hynix Semiconductor Inc.

Young Ho Yang

Chang Soo Lee

Hee Soo Kim

Dong Sun Sheen

Won Joon Choi

Sung Soon Kim

Min Sik Jang

Min Sung Ko

Jong Gi Kim

Woo Jae Chung

Hee Do Na

Jung Myoung Shim

Hyeng Woo Eom

Kyeong Bae Kim

Kwang Wook Lee

Wan Sup Shin

A semiconductor memory device, and a method of manufacturing the semiconductor memory device, includes a first source layer, a second source layer on the first source layer, a stack on the second source layer, a channel structure passing through the stack and the second source layer, and a common source line passing through the stack and the second source layer. The second source layer includes an air gap and a conductive layer surrounding the air gap.

Semiconductor memory device and method of manufacturing the same

A semiconductor device includes a source structure, a bit line, a stacked structure between the source structure and the bit line, a source contact structure penetrating the stacked structure and electrically coupled to the source structure, and a protective pattern interposed between the source contact structure and the source structure and having a varying thickness depending on an area of the protective pattern.

Semiconductor device and manufacturing method of semiconductor device

The method of manufacturing a semiconductor device include: forming conductive patterns in interlayer spaces between interlayer insulating layers, the conductive patterns being separated from each other by a slit passing through the interlayer insulating layers, wherein the conductive patterns include a first by-product; generating a second by-product of a gas phase by reacting the first by-product remaining in the conductive patterns with source gas; and performing an out-gassing process to remove the second by-product.

Method of manufacturing semiconductor device

Method of manufacturing semiconductor device through by-product removal from conductive layer

A semiconductor device and a method for forming the same. The semiconductor device includes a tunnel insulating layer, a charge storage layer including a dopant, and a diffusion barrier layer including at least one of carbon, nitrogen, or oxygen interposed between the tunnel insulating layer and the charge storage layer.

Semiconductor device

A semiconductor device and method where a side wall insulating layer, extending perpendicular from a top surface of a semiconductor substrate, is prevented from contacting the semiconductor substrate by a barrier layer formed at an interface between the semiconductor substrate and the insulating layer.

Semiconductor device and method of manufacturing the same

A method of manufacturing a flash memory device is disclosed. The method includes the steps of providing a semiconductor substrate in which a cell region and a select transistor region are defined, etching the semiconductor substrate in the select transistor region so that there is a first step between the cell region and the select transistor region, forming a cell gate in the cell region, and forming a transistor in the select transistor region.

Method of manufacturing a flash memory device

Provided is a method of manufacturing a capacitor in a semiconductor device, comprising the steps of: forming a first metal film of noble series for the bottom electrode; forming a ferroelectric film on the first metal film; conducting a first thermal process on the resultant structure where the ferroelectric film is formed; conducting an ion implantation process on the resultant structure passing through the first thermal process; conducting a second thermal process on the resultant structure passing through the ion implantation process; forming a second metal layer of noble series for the top electrode on the ferroelectric film in the resultant structure passing through the first thermal process; and conducting a third thermal process on the resultant structure.

Method of manufacturing a ferroelectric capacitor

Disclosed herein is a method of forming an element isolation film of a semiconductor device. An aluminum oxide film of a high wet etch rate is used as a pad oxide film, a trench is formed, and top and bottom edges of the trench is made rounded while removing some of the aluminum oxide film by a cleaning process. It is thus possible to make the top and bottom edges of the trench rounded without using polymer. It is also possible to minimize generation of a moat due to a step between a field region and an active region in a cleaning process before a gate oxide film is formed.

Method of forming an element isolation film of a semiconductor device

The present invention relates to a method of forming an isolation film of a semiconductor device. According to the present invention, the method includes the steps of forming a pad film on a semiconductor substrate, and patterning the pad film of a predetermined region and a predetermined depth of the semiconductor substrate to form trenches, forming sidewall oxide films on sidewalls of the trenches thereby defining a non-active region and an active region, forming a first oxide film for trench burial on the entire surface including the sidewall oxide films, and then performing a polishing process until the pad film is exposed, thus forming a first isolation film, removing the pad film to expose the semiconductor substrate in the active region, forming a silicon layer, which has a height higher than that of the first isolation film, on the exposed semiconductor substrate in the active region, and forming a second oxide film for trench burial on the entire surface, and then performing a polishing process until the silicon layer is exposed, thus forming a second isolation film, whereby an isolation film in which the first isolation film and the second isolation film are stacked is formed.

Growing community of inventors

Chungcheongbuk-do, South Korea

Young Ho Yang