Skhynix Inc.

Other

Research Institute of Industrial Science & Technology

Pohang Iron & Steel Co. Ltd.

Poongsan Corporation

Korea Advanced Institute of Science and Technology

Poong San Metal Corporation

Poongsam Corporation

Young Gyun Kim

Hyun Woo Lee

Ki Woong Lee

Tae Yong Lee

Seung Gu Ji

Sang Jin Lee

Soon Hyung Hong

Geu Rim Lee

Tai Woung Kim

Rae W Chang

Dong K Park

Jae Sung Lee

Yun S Lim

Hee J Yang

Jae K Han

Han I Yoo

Sang K Han

Deung Y Lee

Jin I Seok

In Y Hwang

O Bong Yang

Ju Yong Kim

Jae C Kim

A memory system comprises a memory device including a plurality of memory blocks, and a controller configured to manage a first count, a second count, and a sum value for each of the plurality of memory blocks, the first count being the number of performed random read operations, the second count being the number of performed sequential read operations, the sum value being calculated based on the first count and the second count, and configured to perform a read reclaim operation for a specific memory block among the plurality of memory blocks based on a comparison result of the sum value for the specific block with a reference value.

Memory controller for performing read reclaim operation, memory system including the same, and operating method of memory controller

The present technology relates to a semiconductor device and a method of operating the same. The semiconductor device includes a sensing voltage generator configured to generate a temperature voltage having a voltage level determined according to an internal temperature of the semiconductor device and a reference voltage having a constant voltage level, a code generator configured to generate a temporary code including a sensing code value corresponding to the internal temperature and a boundary value indicating whether the internal temperature is included in a boundary portion associated with at least one temperature range corresponding to the sensing code value based on the temperature voltage and the reference voltage, and a code correction component configured to generate a correction code for generating an operation voltage of the semiconductor device by correcting the temporary code, based on the temporary code and a previously generated correction code.

Semiconductor device and method of operating the same

A storage device having an improved operation speed includes a memory controller for controlling a memory device. The memory controller includes a parameter data generator for generating parameter data for changing a parameter value related to an operation of the memory device, and a parameter controller for outputting the parameter data. The parameter data includes an error protection field associated with the parameter value.

Storage device and operating method thereof

A memory system is provided to include a memory device and a memory controller configured to control the memory device. The memory device includes a first data latch storing information about a state of the memory cell and is configured to: execute a first verification operation and a second verification operation on the memory cell in response to receiving, from the memory controller, a suspend command to suspend a program operation being performed on the memory cell; store, in the first data latch, a temporary value obtained based on a result value of the first verification operation and a result value of the second verification operation; and execute, a resumption command to resume the program operation, a third verification operation, and restore the result value of the first verification operation and the result value of the second verification operation.

Memory system, memory controller, and method of operating memory system

A semiconductor memory device may include: a memory cell array including a plurality of memory cells; a peripheral circuit for performing a program operation on the memory cell array; and a control logic for controlling the peripheral circuit to perform the program operation on the memory cell array. The control logic may control the peripheral circuit to perform a program operation on memory cells included in a selected physical page among the plurality memory cells, in response to a program command, and control the peripheral circuit to perform an additional program operation on at least one memory cell among the memory cells included in the selected physical page, based on whether the program operation has passed.

Semiconductor memory device including program operation status flag cells

A memory system includes: a memory cell array including a plurality of memory blocks; a peripheral circuit configured to perform a read operation on a selected memory block among the plurality of memory blocks and a backup program operation on a backup block among the plurality of memory blocks; and a control circuit configured to control the peripheral circuit to backup data of logical pages included in the selected memory block in the backup block, when a read count of a selected physical page of the selected memory block is equal to or larger than a set value in the read operation on the selected memory block.

Memory device, memory system including the memory device, and method of operating the memory system

A controller controls a semiconductor memory device including a plurality of memory blocks. The controller may include a controller control unit and a storing unit. The controller control unit compares the number of times of a read of an original memory block among the plurality of memory blocks with a predetermined copy generation reference value, determines whether to generate copy data of original data stored in the original memory block, and generates a command corresponding to the determination. The storage unit stores the copy generation reference value and address information about the original memory block.

Controller and operating method thereof

A data storage device includes a conversion block suitable for performing a scramble operation on write data, and generating random write data, wherein the scramble operation includes inversion/non-inversion processing and calculation processing based on a random pattern.

Data storage device performing a scramble operation and operating method thereof

A memory system and a method of operating the same are provided. The method includes reading least significant bit (LSB) data of a first physical page based on a first pre-read voltage and performing a most significant bit (MSB) program based on the LSB data of the first physical page when the MSB program is performed on the first physical page, defining a management area by comparing the number of error bits included in MSB data of the first physical page with a first threshold value, preforming an LSB program on a second physical page of the management area, reading LSB data of the second physical page based on a second pre-read voltage, which is lower than the first pre-read voltage, and performing the MSB program on the second physical page based on the LSB data of the second physical page.

Memory system and method of operating the same

Method for removing iodine compound from acetic acid

Manufacturing process for austenitic high manganese steel having

This invention relates to a high performance copper alloy and its manufacturing methods for electrical and electronic parts which have good electrical conductivity, superior mechanical properties, and high thermal stability of tin-lead plating. The copper alloy consisting essentially of copper and from copper-nickel-silicon-phosphor-magnesium alloys for semiconductor leadframe alloys consisting essentially of copper and from 0.5 to 2.4% by weight nickel, from 0.1 to 0.5% by weight silicon, from 0.02 to 0.16% by weight phosphorus, and from 0.02 to 0.2% by weight magnesium.

Copper alloys for electrical and electronic parts

A cooper base alloy and process having high electrical conductivity. An alloy consists of from 0.005 to 0.15% by weight Niobium, about 0.005 to 0.15% by weight Iron, 0.01 to 0.05% by weight phosphorus, and the balance copper.

Cooper-Fe-P-Nb alloys for electrical and electronic parts and its

A stainless maraging steel and process having high strength, high toughness and high corrosion resistance. The alloy consists of from 8 to 12% by weight Cr, 7 to 12% by weight Ni, 2 to 6% by weight W, 0.1 to 0.5% by weight Al, 0.1 to 0.4% by weight Ti, and the balance iron.

Stainless maraging steel having high strength, high toughness and high

A process for printing a light bulb having a multicolored design which comprises the steps of attaching a transfer film having a multicolored design onto the surface of a conventional light bulb, and burning the transfer film attached to the light bulb at a temperature of about 550.degree.-650.degree. C. so as to leave the multicolored design on the surface of the light bulb which exhibits high durability and an excellent appearance of beauty.

Growing community of inventors

Seoul, South Korea

Young Gyun Kim