Samsung Electronics Co., Ltd.

Lg Display Co., Ltd.

Young-Eun Lee

Jong-Wook Lee

Yu-Gyun Shin

Sun-Ghil Lee

In-Soo Jung

Yong-Hoon Son

Deok-Hyung Lee

Young-pil Kim

Sung-Min Kim

Si-Young Choi

Dong-Won Kim

Byeong-Chan Lee

Seung-Hyun Lee

Kyoung-hwan Yeo

Seong-ghil Lee

A semiconductor device includes an inorganic insulating layer on a semiconductor substrate, a contact plug that extends through the inorganic insulating layer to contact the semiconductor substrate and a stress buffer spacer disposed between the node contact plug and the inorganic insulating layer. The device further includes a thin-film transistor (TFT) disposed on the inorganic insulating layer and having a source/drain region extending along the inorganic insulating layer to contact the contact plug. The device may further include an etch stop layer interposed between the inorganic insulating layer and the semiconductor substrate.

Semiconductor devices having contact plugs with stress buffer spacers and methods of fabricating the same

A liquid crystal display device capable of reducing a time delay in lighting of the liquid crystal display device includes a liquid crystal panel, at least one fluorescent lamps disposed below the liquid crystal panel, formed as a cylindrical shape having a central axis and supplying light to the liquid crystal panel, and at least one auxiliary optical source disposed to face the liquid crystal panel while having the central axis therebetween and supplying light to the fluorescent lamps.

Liquid crystal display device

A semiconductor device formed on a strained silicon layer and a method of manufacturing such a semiconductor device are disclosed. In accordance with this invention, a first silicon germanium layer is formed on a single crystalline silicon substrate; a second silicon germanium layer is formed on the first silicon germanium layer, the second silicon germanium layer having a concentration of germanium in a range of about 1 percent by weight to about 15 percent by weight based on the total weight of the second silicon germanium layer; a strained silicon layer is formed on the second silicon germanium layer; an isolation layer is formed at a first portion of the strained silicon layer; a gate structure is formed on the strained silicon layer; and, source/drain regions are formed at second portions of the strained silicon layer adjacent to the gate structure to form a transistor.

Method of forming a MOSFET on a strained silicon layer

MOSFET formed on a strained silicon layer

A capacitive connector for a backlight unit having a light source including: a first conductive layer covering an end portion of the light source; an insulation layer covering an external surface of the first conductive layer; and a second conductive layer separated from the first conductive layer with the insulation layer interposed therebetween.

Backlight unit and liquid crystal display device having the same

Embodiments of the present invention include heterogeneous substrates, integrated circuits formed on such heterogeneous substrates, and methods of forming such substrates and integrated circuits. The heterogeneous substrates according to certain embodiments of the present invention include a first Group IV semiconductor layer (e.g., silicon), a second Group IV pattern (e.g., a silicon-germanium pattern) that includes a plurality of individual elements on the first Group IV semiconductor layer, and a third Group IV semiconductor layer (e.g., a silicon epitaxial layer) on the second Group IV pattern and on a plurality of exposed portions of the first Group IV semiconductor layer. The second Group IV pattern may be removed in embodiments of the present invention. In these and other embodiments of the present invention, the third Group IV semiconductor layer may be planarized.

Heterogeneous group IV semiconductor substrates, integrated circuits formed on such substrates, and related methods

Methods of etching a semiconductor substrate may include providing a first gas that is chemically reactive with respect to the semiconductor substrate, and while providing the first gas, providing a second gas different than the first gas. More particularly, a molecule of the second gas may include a hydrogen atom, and the second gas may lower a temperature at which the first gas chemically reacts with the semiconductor substrate. The mixture of the first and second gases may be provided adjacent the semiconductor substrate to etch the semiconductor substrate.

Low temperature methods of etching semiconductor substrates

A CMOS transistor structure and related method of manufacture are disclosed in which a first conductivity type MOS transistor comprises an enhancer and a second conductivity type MOS transistor comprises a second spacer formed of the same material as the enhancer. The second conductivity type MOS transistor also comprises a source/drain region formed in relation to an epitaxial layer formed in a recess region.

Growing community of inventors

Gyeonggi-do, South Korea

Young-Eun Lee