Skhynix Inc.

Hynix Semiconductor Inc.

Samsung Electronics Co., Ltd.

Young-Chul Sohn

Min-Seok Shin

Bong-Hwa Jeong

Gyu-Tae Park

Ki-Beom Lee

Jong-Ryul Lee

A driver includes a first level shifting unit generating a second signal swinging in a second threshold range in response to a first signal swinging in a first threshold range, a second level shifting unit generating a third signal swinging in a third threshold range in response to the second signal, a first pull-up driving unit driving an output terminal with a first high-voltage in response to the second signal, a first pull-down driving unit driving the output terminal with a first low voltage in response to the third signal, a second pull-down driving unit driving the output terminal with a second low voltage higher than the first low voltage in response to the fourth signal, and a first path coupling unit coupling the second pull-down driving unit with the output terminal in response to the second signal.

Driver and image sensing device including the same

Disclosed are a ramp signal generator capable of reducing the size of a feedback capacitor by using a current subtraction and a CMOS image sensor using the same. The ramp signal generator may include a current supply unit suitable for supplying a first current; a current subtraction unit suitable for subtracting the first current from a second current, or the second current from the first current; and a ramp signal generation unit suitable for generating a ramp signal according to a third current and a reference voltage. The third current is a result of the subtraction.

Ramp signal generator and CMOS image sensor using the same

An image sensing device includes a unit pixel including one or more first sub-pixels of a white color and a plurality of second sub-pixels of a color other than the white color in a matrix, a row control block suitable for controlling the first and second sub-pixels to output sequentially first and second pixel signals during one row unit time, and an image process block suitable for processing the first and second pixel signal's.

Image sensing device for improving dynamic range

An image sensing device includes: a pixel array including a plurality of pixels arranged in row and column directions; a row control portion suitable for controlling a part of a plurality of rows included in the pixel array by an unit of two or more sequential rows so that pixel signals are simultaneously outputted from the pixel array through the sequential rows; a first readout circuit portion suitable for sequentially reading out a part of the pixel signals in row sequence order; a second readout circuit portion suitable for sequentially reading out the rest of the pixel signals in row sequence order; and a storage portion suitable for storing on row by row basis the read out signals sequentially read out in row sequence order from the first and second readout circuit portions.

Image sensing device with shared pixel architecture and efficient readout circuitry

A CMOS image sensor may include an active pixel sensor suitable for generating a pixel signal corresponding to incident light, a reference pixel array suitable for shielding incident light and generate a reference value, a readout circuit suitable for comparing the pixel signal and the reference value with a ramp signal and for removing a first noise of the pixel signal in a common mode, and a pixel signal processing circuit suitable for performing a linear operation on an output signal from the readout circuit and the reference value, and for removing a second noise of the pixel signal in the common mode.

Pixel signal processing apparatus for removing noise in an image sensor having a column parallel structure and CMOS image sensor using the same

A comparator includes a first amplification unit suitable for differentially amplifying a pixel signal and a ramp signal, a second amplification unit suitable for amplifying a signal outputted from the first amplification unit and outputting a comparison result, a current control unit suitable for controlling a current flow in response to the comparison result and a current compensation and noise removal unit suitable for compensating for current and removing noise under control of the current control unit.

Comparator and analog-to-digital converter using the same

A integrated circuit includes an analog power domain circuit having more than one stages, a digital power domain circuit having at least one stage receiving the output signal of the analog power domain circuit, and a voltage regulating unit suitable for supplying at least one scaled power to the latter part of the stages to reduce a voltage level difference between the analog power domain circuit and the digital power domain circuit.

Integrated circuit, analog-digital converter and CMOS image sensor with the same

A signal sampling circuit includes: a signal output unit configured to output a level signal to an output node in response to a control signal; a signal sampling unit coupled to the output node and configured to sample the level signal in a sampling period; a first current sinking unit configured to sink a constant current from the output node; and a second current sinking unit configured to sink a current from the output node after a time point where the control signal is deactivated.

Signal sampling circuit and image sensor having the same

A refresh control circuit includes a temperature detecting unit that detects the temperature and generates a temperature detecting voltage, a control unit that generates a plurality of control signals, a digital converting unit that converts the temperature detecting voltage into a plurality of bits of digital code and outputs a plurality of bits of digital code according to the control of a plurality of control signals, and a refresh signal generating unit that generates a refresh signal with a period corresponding to the input of a plurality of bits of digital code.

Refresh control circuit in semiconductor memory apparatus and method of controlling period of refresh signal using the same

An internal voltage generator for generating a back bias voltage includes a back bias voltage pumping block for comparing a reference voltage with a feedback back bias voltage to generate a back bias enable signal and the back bias voltage in response to an activated self refresh signal and a back bias voltage discharge controlling unit for discharging the back bias voltage into a ground voltage in response to the activated self refresh signal and the back bias enable signal.

Growing community of inventors

Gyeonggi-do, South Korea

Young-Chul Sohn