Samsung Electronics Co., Ltd.

Daewoo Electronics Co., Ltd.

Young-Chang Kim

Young-Koog Han

Woo-Seok Shim

Heung-jo Ryuk

Dong-Geon Kim

Han-Ku Cho

Sung-Woo Lee

Suk-Joo Lee

Sung-Soo Suh

Yong-Jin Chun

A semiconductor integrated circuit device may include a standard cell region on a surface of a substrate and a first active region on the surface of the substrate in the standard cell region, wherein the first active region has a length in a first direction. A second active region may be on the surface of the substrate in the standard cell region, the second active region may have a length in the first direction, the length of the second active region may be greater than the length of the first active region, and an axis in a second direction may intersect centers of the first and second active regions so that the first and second active regions are symmetric about the axis in the second direction. A first gate electrode may extend across the first active region in the first direction, and a second gate electrode may extend across the second active region in the first direction.

Semiconductor integrated circuit devices

Provided are a compensating mask, a multi-optical system using the compensating mask, and a method of compensating for a 3-dimensional (3-D) mask effect using the compensating mask. Methods of compensating for a 3-D mask effect using a compensating mask may include generating a first kernel corresponding to a normal mask used for forming a minute pattern, generating a second kernel corresponding to a compensating mask, mixing the first kernel corresponding to the normal mask with the second kernel corresponding to the compensating mask, and generating a multi-optical system kernel corresponding to mixing the first kernel and the second kernel.

Compensating masks, multi-optical systems using the masks, and methods of compensating for 3-D mask effect using the same

A semiconductor wafer has an alignment mark for use in aligning the wafer with exposure equipment during the manufacturing of a semiconductor device. The wafer is made by forming a chemical mechanical polishing target layer over an alignment mark layer, chemically-mechanically polishing the target layer to planarize the same, and prior to forming the chemical mechanical polishing target layer over the alignment mark layer, forming a dense pattern of lands or trenches in the alignment layer of dimensions and an inter-spacing preselected to inhibit a dishing phenomenon from occurring in the target layer as the result of its being chemically-mechanically polished. The lands or trenches may be disposed in at least a 2&#xd7;2 array of rows and columns. An alignment system for use with this wafer irradiates the mark with light, and includes an image sensor which produces both a Y-axis alignment waveform signal from light reflecting from the column(s) of lands or trenches and an X-axis alignment waveform signal from light reflecting from the row(s) of lands or trenches. Alternatively, the lands or trenches may be disposed along at least two lines arranged in the shape of a chevron. In this case, the alignment system scans an illuminated cross-shaped pattern of a reticle across the alignment mark. A photo-detection unit collects the reflected light and determines the relative amounts of light coming from the wafer surface, from one of the lines of lands or trenches of the alignment mark, and from the other such line of lands or trenches.

Semiconductor wafer bearing alignment mark for use in aligning the wafer with exposure equipment, alignment system for producing alignment signals from the alignment mark, and method of determining the aligned state of a wafer from the alignment mark

An apparatus for measuring the focus of a light exposure system for selectively exposing a photosensitive plate to light rays in a process of fabricating a semiconductor device, wherein there is provided a focus measuring part having opaque region, transparent region, and a transparent electrode arranged in the transparent region, a conducting stage supporting the photosensitive plate; and a capacitance detector for measuring the capacitance between the transparent electrode and the conducting stage.

Apparatus for measuring the focus of a light exposure system used for fabricating a semiconductor device

A semiconductor wafer has an alignment mark for use in aligning the wafer with exposure equipment during the manufacturing of a semiconductor device. The wafer is made by forming a chemical mechanical polishing target layer over an alignment mark layer, chemically-mechanically polishing the target layer to planarize the same, and prior to forming the chemical mechanical polishing target layer over the alignment mark layer, forming a dense pattern of lands or trenches in the alignment layer of dimensions and an inter-spacing preselected to inhibit a dishing phenomenon from occurring in the target layer as the result of its being chemically-mechanically polished. The lands or trenches may be disposed in at least a 2&times;2 array of rows and columns. An alignment system for use with this wafer irradiates the mark with light, and includes an image sensor which produces both a Y-axis alignment waveform signal from light reflecting from the column(s) of lands or trenches and an X-axis alignment waveform signal from light reflecting from the row(s) of lands or trenches. Alternatively, the lands or trenches may be disposed along at least two lines arranged in the shape of a chevron. In this case, the alignment system scans an illuminated cross-shaped pattern of a reticle across the alignment mark. A photo-detection unit collects the reflected light and determines the relative amounts of light coming from the wafer surface, from one of the lines of lands or trenches of the alignment mark, and from the other such line of lands or trenches.

ALIGNMENT MARK OF SEMICONDUCTOR WAFER FOR USE IN ALIGNING THE WAFER WITH EXPOSURE EQUIPMENT, ALIGNMENT SYSTEM FOR PRODUCING ALIGNMENT SIGNALS FROM THE ALIGNMENT MARK, AND METHOD OF DETERMINING THE ALIGNED STATE OF A WAFER FROM THE ALIGNMENT MARK

A focus test mask for a projection exposure system, a focus monitoring system using the same, and a focus monitoring method include a transparent substrate and a focus test pattern formed on the substrate. The focus test pattern includes a first light shielding pattern and a second light shielding pattern placed inside the first light shielding pattern. Both light shielding patterns have fine protruding patterns arranged along edges of respective first and second closed geometric shapes defining the light shielding patterns. The focus test pattern projected onto the surface of the object allows quantitative measurement of the optimal focuses of the projection exposure system. By using the focus test mask for a projection exposure system, the optimal focuses of the projection exposure system can be periodically measured easily and precisely.

Focus test mask for projection exposure system, focus monitoring system

A refrigerator door switch system for sensing opening of a freezer compartment door and a fresh food compartment door comprises a push button switch installed at the freezer compartment door or the fresh food compartment door, being positioned at a first position for stopping a fan motor for a cool air supply and turning on a cabinet lamp when the freezer compartment door or the fresh food compartment door is opened, and being positioned at a second position for driving the fan motor and turning off the cabinet lamp when the freezer compartment door and the fresh food compartment door are closed; and a switch operation cam installed at the fresh food compartment door or the freezer compartment door, corresponding to the push button switch for positioning the push button switch to the first position when the freezer compartment door or the fresh food compartment door is opened, and for positioning the push button switch to the second position when the freezer compartment door and the fresh food compartment door are closed.

Growing community of inventors

Seoul, South Korea

Young-Chang Kim