Samsung Electronics Co., Ltd.

Kyungdong Navien Co., Ltd.

Young Bae Kim

Jun Jin Kong

Hong Rak Son

Chang-seung Lee

Eun Chu Oh

Jun Kyu Park

David Seo

Joo-ho Lee

Yong Sung Kim

Pil Sang Yoon

Duck Sik Park

Sung Jun Ahn

Han Shin Shin

Young Jun Yun

Shle Ge Lee

The purpose of the present invention is to provide a tube assembly for a tubular heat exchanger and a tubular heat exchanger comprising the same, the tube assembly for a tubular heat exchanger being capable of enhancing efficiency in heat exchange between a heat medium and a combustion gas and also preventing high-temperature oxidation and the burn-out of a turbulator caused by the combustion heat of the combustion gas and preventing the deformation or damage of a tube which may occur in an environment with a high water pressure, thereby improving the durability thereof. The tube assembly for a tubular heat exchanger of the present invention, for achieving the purpose, comprises: a tube which is formed in a flat shape and enables a combustion gas generated in a combustion chamber to flow along the inside thereof and exchange heat with a heat medium which flows outside thereof; and a turbulator which is coupled to the inside of the tube and induces the generation of turbulence in the flow of the combustion gas.

Tube assembly for tubular heat exchanger, and tubular heat exchanger comprising same

A semiconductor package is provided. The semiconductor package includes a first substrate, a first semiconductor chip arranged on the first substrate, a first group of at least one solder ball arranged on a side surface of the first semiconductor chip, an interposer arranged on the first semiconductor chip and the first substrate and being in contact with the first group of at least one solder ball, and an adhesive layer arranged between the first semiconductor chip and the interposer and configured to expose at least a portion of un upper surface of the first semiconductor chip, wherein a first height from an upper surface of the first substrate to the upper surface of the first semiconductor chip is greater than a second height of the first group of at least one solder ball.

Semiconductor package

A semiconductor package includes a package substrate, a flip chip coupled to the package substrate, an interposer stacked on the flip chip and including a first terminal and a second terminal at an upper surface thereof, a bonding wire which connects the first terminal and the package substrate and a mold layer which covers the interposer, the flip chip and the bonding wire. The mold layer has a signal hole which exposes the second terminal, and at least one dummy hole spaced apart from the signal hole on an upper surface of the interposer.

An image sensor package includes a substrate, an image sensor chip disposed on the substrate, and an external force absorbing layer disposed between the substrate and the image sensor chip and having a first surface and a second surface opposite to the first surface. The image sensor package further includes an adhesive layer configured to bond the second surface of the external force absorbing layer to the substrate. The adhesive layer has a first modulus, and the external force absorbing layer has a second modulus different from the first modulus.

Image sensor package and image sensing module

A resistive memory system having a plurality of memory cells includes a memory device having a resistive memory cell array and a controller. The controller generates write data to be written to the memory cell array by encoding input data such that the input data corresponds to an erase state and a plurality of programming states that a memory cell may have. The input data is encoded such that at least one of the number of memory cells assigned a first programming state and the number of memory cells assigned a second programming state is smaller than at least one of the numbers of memory cells in the erase state and the other programming states. The first programming state has a highest resistance level among the plurality of programming states, and the second programming state has a second highest resistance level among the plurality of programming states.

Resistive memory system and method of operating the resistive memory system

Graphene semiconductor device, a method of manufacturing a graphene semiconductor device, an organic light emitting display and a memory, include forming a multilayered member including a sacrificial substrate, a sacrificial layer, and a semiconductor layer deposited in sequence, forming a transfer substrate on the semiconductor layer, forming a first laminate including the transfer substrate and the semiconductor layer by removing the sacrificial layer to separate the sacrificial substrate from the semiconductor layer, forming a second laminate by forming a graphene layer on a base substrate, combining the first laminate and the second laminate such that the semiconductor layer contacts the graphene layer, and removing the transfer substrate.

Growing community of inventors

Seoul, South Korea

Young Bae Kim