Magnachip Semiconductor, Inc.

Intellectual Ventures II LLC

Crosstek Capital, LLC

Youn-Sub Lim

Jae-Young Park

An image sensor includes an epi-layer of a first conductivity type formed in a substrate, a photodiode formed in the epi-layer, and a first doping region of a second conductivity type formed under the photodiode to separate the first doping region from the photodiode.

Image sensor and method for fabricating same

A method includes: forming a transfer gate on a semiconductor substrate; forming a first ion implantation region on a first side of the transfer gate; forming a second ion implantation region on the first side of the transfer gate such that the second ion implantation region encloses the first ion implantation region; forming a third ion implantation region along a surface of the semiconductor substrate; and forming a floating diffusion region at a second side of the transfer gate.

CMOS image sensor and fabricating method thereof

An image sensor includes: a first impurity region of the first conductive type aligned with one side of the gate structure and extending to a first depth from a surface portion of the semiconductor layer; a first spacer formed on each sidewall of the gate structure; a second impurity region of the first conductive type, aligned with the first spacer and extending to a second depth that is larger than the first depth from the surface portion of the semiconductor layer; a second spacer formed on each sidewall of the first spacer; a third impurity region of the first conductive type aligned with the second spacer and extending to a third depth that is larger than the second depth from the surface portion of the semiconductor layer; and a fourth impurity region of a second conductive type beneath the third impurity region.

Image sensor with improved charge transfer efficiency and method for fabricating the same

A fabricating method of a CMOS image sensor includes the steps of: forming a transfer gate on a semiconductor substrate where a device isolation layer is formed; forming a first n-type ion implantation region for a photodiode beneath a surface of the semiconductor substrate, the first n-type ion implantation region being aligned at one side of the transfer gate and having a first width and a first ion implantation depth; forming a second n-type ion implantation region aligned at one side of the transfer gate, the second n-type ion implantation region enclosing the first n-type ion implantation region and having a second width wider than the first width and a second ion implantation depth deeper than the first ion implantation depth and a second depth; forming a p-type ion implantation region between a surface of the semiconductor substrate and the first n-type ion implantation region, the p-type ion implantation region being aligned at one side of the transfer gate and partially overlapped with the first n-type ion implantation region; forming spacers on both sidewalls of the transfer gate; and forming a floating diffusion region at the other side of the transfer gate.

Image sensor and method for fabricating the same

A complementary metal oxide semiconductor (CMOS) image sensor capable of improving photosensitivity and a signal to noise ratio and a method for fabricating the same are provided. An image sensor for embodying the colors of red, green and blue includes: a plurality of photodiodes formed on a substrate and collecting light incident to different unit pixels; a silicon oxide layer formed on the plurality of photodiodes; a silicon nitride layer formed on the silicon oxide layer, wherein the silicon nitride layer is formed in a single layer in unit pixels of green and blue and split into two layers on an upper portion of the unit pixel of red; and a plurality of microlenses formed on portions of the silicon nitride layer corresponding to the respective photodiodes.

An image sensor includes: a gate structure on a semiconductor layer of a first conductive type; a first impurity region of the first conductive type aligned with one side of the gate structure and extending to a predetermined depth from a surface portion of the semiconductor layer; spacers formed on sidewalls of the gate structure; and a second impurity region of a second conductive type formed in a portion of the semiconductor layer under the first impurity region, wherein the first impurity region includes: a first region of which portion aligned with the one side of the gate structure; a second region aligned with the one of the spacers and having a concentration higher than that of the first region; and a third region apart from the one side of the gate structure with a predetermined distance and having a concentration higher than that of the second region.

Growing community of inventors

Chungcheongbuk-do, South Korea

Youn-Sub Lim