Korea Advanced Institute of Science and Technology

Industry-University Cooperation Foundation Hanyang University

Skhynix Inc.

Youjip Won

Jieun Kim

Kyoungho Koo

Joontaek Oh

A multi-level data storage device includes a first storage device; a second storage device located at a lower level than the first storage device; an input/output (I/O) control circuit configured to control a first write operation for the first storage device and a second write operation for the second storage device; and an imbalance control circuit configured to calculate an imbalance index corresponding to a write set that is generated when a sum of a number of first write operations and a number of the second write operations becomes a predetermined number, and configured to control the I/O control circuit to control imbalance of write operations performed in the multi-level data storage device by controlling the first write operation or the second write operation based on the imbalance index.

Multi-level data storage device and operation method thereof

Disclosed is a multiple file transaction method comprising: a first step in which, for each of a plurality of files, a file system of a host stores, in a master commit block, the location of an inode block in a storage, the inode block being a block in which an inode of the file is written; and a second step in which the file system stores the master commit block in the storage.

Commit block structure and device, for multiple file transaction

Disclosed is a write method comprising a step in which a storage device determines an execution order between received first and second write commands, and executes the first write command and the second write command according to the determined execution order. The first write command comprises first stream identification information having {first stream ID, first epoch ID}, the second write command comprises second stream identification information having {second stream ID, second epoch ID}, and when the first stream ID and the second stream ID are different from each other, the execution order is determined without using the result of comparison between the first epoch ID and the second epoch ID.

Method and device for determining order guarantee unit in multi-instruction queue storage

Provided is a method of controlling a RAID controller, the method including generating, by the RAID controller, a command sequence, and transmitting, by the RAID controller, when a first cache barrier command included in the command sequence is identified, at least one cache barrier command to an arbitrary disk constituting a RAID before transmitting a first write command arranged after the first cache barrier command in the command sequence to the arbitrary disk.

Method for processing a cache barrier command for a disk array and device for the same

Provided is a method and apparatus for an adaptive context switching for a fast block input/output. The adaptive context switching method may include: requesting, by a process, an input/output device to perform an input/output of data; comparing a Central Processing Unit (CPU) effectiveness based on whether the context switching is performed; and performing the input/output through the context switching to a driver context of the input/output device, or directly performing, by the process, the input/output based on a comparison result of the CPU effectiveness.

Apparatus and method for adaptive context switching scheduling scheme for fast block input and output

Disclosed is a non-volatile memory data protecting device and method. The non-volatile memory data protecting device that is used for protecting non-volatile memory data when a power is shut down in a system, may include a signal delay unit to delay a drop in voltage of an input/output line, a power shutdown sensor to sense power shutdown of a system, and a controller to control the signal delay unit in response to whether the system is shut down.

Device and method for protecting data in non-volatile memory

Disclosed is a non-volatile memory data protecting device and method. The non-volatile memory data protecting device () that is used for protecting non-volatile memory data when a power is shut down in a system, may include a signal delay unit () to delay a drop in voltage of an input/output line, a power shutdown sensor () to sense power shutdown of a system, and a controller () to control the signal delay unit in response to whether the system is shut down.

Growing community of inventors

Gyeonggi-do, South Korea

Youjip Won