Hitachi, Ltd.

Hitachi Displays, Ltd.

Hitachi Device Engineering Co., Ltd.

Youichi Igarashi

Yoshihiro Imajo

Kaoru Hasegawa

Hironori Kondo

Shuuichi Nakano

Yoshihiro Ashi

Yoshinori Tanaka

Yukio Nakano

Hiroyuki Nakano

Satoshi Aoki

Tohru Kazawa

Shinya Sasaki

Masahiro Takatori

Hideaki Tsushima

Shin Nishimura

Masahiro Ogino

Naohiro Sakakida

Hironari Matsuda

Yoshio Oowaki

Yoshihiro Yano

Kenji Tomooka

Ryoji Tateyari

More accurate frame-rate conversion is carried out in a simpler circuit configuration. Search areas SAand SAin each of which the pixel facing the interpolation position Pof a pixel in an interpolation frame is taken as a central pixel are set in the current frame and immediately previous frame of an image signal, a set of pixels point-symmetrical to the interpolation position Pin each of the search areas SAand SAare defined as pixel pairs, and differential luminance values between the individual pixels in the pixel pairs are calculated for each pixel pair. Of all these pixel pairs, only that having the minimum absolute differential value is selected as interpolation pixel pair, an interpolation frame is generated from the current frame and the immediately previous frame on the basis of the interpolation pixel vector of that interpolation pixel pair.

Image interpolation device and a frame rate converter and image display apparatus using the same

Even in a liquid crystal display device that has been completed as a product, EMI countermeasures and power saving can be realized according to the use environment of an electronic apparatus in which the liquid crystal display device is to be mounted. A timing converter mounted on an interface printed circuit board of the liquid crystal display device is provided with a display mode selecting terminal. A display mode selecting signal which varies the frequency of a pixel clock signal for an image signal is applied to the display mode selecting terminal from the outside, thereby varying the frequency of the pixel clock signal.

Image display device

On an interface of a liquid crystal display device, which converts the number of pixels of image signals inputted from an external signal source, such as a host computer, into image signals having a smaller number of pixels and fetches the image signs into drain drivers at double edges of a clock signal of low frequency, a clock surveillance unit is mounted, which includes a clock synthesizer and a clock comparator circuit, and which detects the presence or the absence of an irregularity in the timing of a pixel clock signal inputted from the external signal source and outputs a determination of the normal/irregular status of the pixel clock signal. When it is determined that the pixel clock signal is irregular, the supply of image data to the drain drivers from a parallel-serial converter is stopped, so that the generation of an irregularity in the display produced by the liquid crystal display device can be obviated.

Liquid crystal display device and driving method thereof

A liquid crystal display apparatus including a display control unit which includes a reordering unit which reorders originally ordered display data inputted thereto, and sends the reordered display data to M ones of a plurality of drivers through a bus line to which the M drivers are connected, where M is a positive integer, the M drivers connected to the bus line being divided into N driver groups, where N is a positive integer smaller than M, and a clock generating unit which generates N clock signals having a same frequency as and different phases from each other, and sends the N clock signals to the N driver groups respectively such that each one of the N clock signals is sent to a respective one of the N driver groups.

Liquid crystal display apparatus having display control unit for lowering clock frequency at which pixel drivers are driven

A liquid crystal display apparatus comprises a liquid crystal display panel having a plurality of pixels formed in a matrix configuration, M driving means for applying a plurality of pixels arranged in a column direction with video voltage based on display data, where M is a positive integer, and display control means for sending inputted display data to the M driving means, and for generating control signals including at least clock signals based on input display control signals inputted thereto and sending the control signals to the M driving means to control and drive the M driving means, wherein the display control means reorders originally ordered display data inputted thereto and sends the recorded display data to the M driving means, and generates N clock signals having the same frequency as and different phases from each other, where N is a positive integer smaller than M, and sends the N clock signals to N driving means groups, respectively.

A liquid crystal display device includes a liquid crystal display panel in which pixels are arranged in rows and columns. Each of the pixels includes a pixel electrode, and a thin-film transistor having a gate electrode and a drain electrode. Gate signal lines arranged in the rows are connected to the gate electrodes of the thin-film transistors. Drain signal lines arranged in the columns are connected to the drain electrodes of the thin-film transistors. The liquid crystal display device further includes a gate drive circuit for driving the gate signal lines, and a drain drive circuit for driving the drain signal lines. The drain drive circuit receives a plurality of grey-scale reference voltages from an external circuit, interpolates a plurality of intermediate voltages between each pair of adjacent ones of the grey-scale reference voltages, selects voltages from the grey-scale reference voltages and the intermediate voltages, and applies the selected voltages to the drain signal lines. V,is a grey-scale reference voltage corresponding to a minimum grey-scale level, Vm is a grey-scale reference voltage corresponding to a maximum grey-scale level, and Vi is a grey-scale reference voltage that is nearest to a voltage level (Vm&plus;V,)/2. A number of intermediate voltages interpolated between V(i&minus;1) and Vi is different from both a number of intermediate voltages interpolated between V,and V,, and a number of intermediate voltages interpolated between V(m&minus;1) and Vm.

Low power driving method for reducing non-display area of TFT-LCD

A liquid crystal display device includes a drain drive circuit for driving drain signal lines of a liquid crystal display panel. The drain drive circuit receives a plurality of grey-scale reference voltages from an external circuit, interpolates a plurality of intermediate voltages between each pair of adjacent ones of the grey-scale reference voltages, selects voltages from the grey-scale reference voltages and the intermediate voltages, and applies the selected voltages to the drain signal lines. V0 is a grey-scale reference voltage corresponding to a minimum grey-scale level, Vm is a grey-scale reference voltage corresponding to a maximum grey-scale level, and Vi is a grey-scale reference voltage that is nearest to a voltage level (Vm+V0)/2. A number of intermediate voltages interpolated between V(i-1) and Vi is greater than both a number of intermediate voltages interpolated between V0 and V1, and a number of intermediate voltages interpolated between V(m-1) and Vm.

An optical repeater for realizing transmission of supervisory information of an optical fiber transmission system without the output power of an optical fiber amplifier being reduced, wherein a supervisory optical transmitter and optical receiver with a wavelength which is similar to the wavelength of the pumping light source of the optical fiber amplifier are mounted, and on the input side of the optical repeater, pumping light is multiplexed in the forward direction and a supervisory optical signal, which is multiplexed in wavelength and transmitted, is demultiplexed simultaneously by the first wavelength multi- and demultiplexer and they are received by the supervisory optical receiver, and on the output side of the optical repeater, pumping light is muitiplexed in the reverse direction and a supervisory optical signal outputted from the supervisory optical transmitter is multiplexed by the second wavelength multi- and demultiplexer.

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Mobara, Japan

Youichi Igarashi