Sony Semiconductor Solutions Corporation

Yosuke Nitta

Yuichi Yamamoto

Nobutoshi Fujii

Yoshiya Hagimoto

The present disclosure relates to an imaging device, an electronic device, and a manufacturing method enabling to reduce a manufacturing cost. There are provided: a first semiconductor element including an imaging element configured to generate a pixel signal; and a second semiconductor element in which a first signal processing circuit and a second signal processing circuit that are configured to process the pixel signal are embedded by an embedded member. The first signal processing circuit has a structure including at least one more layer than the second signal processing circuit. There are further provided: a first wiring line that connects the first semiconductor element and the first signal processing circuit; and a second wiring line that connects the first signal processing circuit and the second signal processing circuit. The present disclosure can be applied to an imaging device.

Imaging device, electronic device, and manufacturing method

A semiconductor device includes a first substrate which is individualized and includes a first semiconductor circuit (LOG) including a first terminal, and a second substrate which includes a second semiconductor circuit (PIX) including a second terminal. The first terminal and the second terminal are joined. The second substrate includes a first insulating layer that is arranged above the second substrate, and a second insulating layer that is arranged at least partially above the first insulating layer and in which the second terminal is arranged.

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KANAGAWA, Japan

Yosuke Nitta