Mitsubishi Electric Corporation

Yosuke Nakata

Tatsuya Kawase

Yuji Imoto

Masayoshi Tarutani

Kenji Harada

Jun Fujita

Noboru Miyamoto

Mikio Ishihara

Taishi Sasaki

Yuji Sato

Seiya Nakano

Shinya Soneda

Kazuaki Hiyama

Kentaro Yoshida

Osamu Usui

Yoshinori Yokoyama

Takuya Hamaguchi

Hiroya Sannai

Kei Hayashi

Shinya Akao

An object is to provide technology that enables cost reduction or downsizing of semiconductor packages. The wiring element includes a second substrate, a plurality of first relay pads arranged on a surface of the second substrate opposite to the conductor substrate and connected to each of the control pads of the plurality of semiconductor elements by wires, a plurality of second relay pads arranged on the surface of the second substrate opposite to the conductor substrate, the number thereof being equal to or lower than the number of the plurality of first relay pads, and a plurality of wiring portions arranged on the surface of the second substrate opposite to the conductor substrate and selectively connecting the plurality of first relay pads and the plurality of second relay pads.

Semiconductor package and semiconductor device

A semiconductor chip () is bonded to an upper surface of an electrode substrate () via a first solder (). A lead frame () is bonded to an upper surface of the semiconductor chip () via a second solder (). An intermediate plate () is provided in the first solder () between the electrode substrate () and the semiconductor chip (). A yield strength of the intermediate plate () is higher than yield strengths of the electrode substrate () and the first solder () within the whole operating temperature range of the semiconductor device.

Semiconductor device having high yield strength intermediate plate

An object is to provide technology that enables cost reduction or downsizing of semiconductor packages. The wiring element includes a second substrate, a plurality of first relay pads arranged on a surface of the second substrate opposite to the conductor substrate and connected to each of the control pads of the plurality of semiconductor elements by wires, a plurality of second relay pads arranged on the surface of the second substrate opposite to the conductor substrate, the number thereof being equal to or lower than the number of the plurality of first relay pads, and a plurality of wiring portions arranged on the surfaceof the second substrate opposite to the conductor substrate and selectively connecting the plurality of first relay pads and the plurality of second relay pads.

Semiconductor package and production method thereof, and semiconductor device

A semiconductor chip including a main electrode and a control electrode is bonded to a substrate. A wiring chip including a first electrode, a second electrode and a wiring is bonded to the substrate. A main electrode member is bonded to the main electrode. A control electrode member is bonded to the second electrode. The control electrode is bonded to the first electrode with a connection member. The semiconductor chip, the substrate, the wiring chip, the main electrode member, the control electrode member and the connection member are putted into a mold and are sealed with sealing material by injecting the sealing material into the mold in a state that distal end surfaces of the main electrode member and the control electrode member are pressed against a buffer material provided between the main electrode member/the control electrode member and the mold. The sealing material is not ground.

Manufacturing method of semiconductor device

A semiconductor apparatus includes: a first conductor plate; a second conductor plate separated from the first conductor plate; a plurality of semiconductor devices having back surface electrodes connected to the first conductor plate; a relay substrate mounted on the second conductor plate and including a plurality of first relay pads and a second relay pad connected to the plurality of first relay pads; a plurality of metal wires respectively connecting control electrodes of the plurality of semiconductor devices to the plurality of first relay pads; a first conductor block connected to front surface electrodes of the plurality of semiconductor devices; a second conductor block connected to the second relay pad; and a sealing material sealing the first and second conductor plates, the plurality of semiconductor devices, the relay substrate, the metal wire, and the first and second conductor blocks, the sealing material includes a first principal surface and a second principal surface opposed to each other, the first conductor plate is exposed from the first principal surface, the second conductor plate is not exposed from the first principal surface, and the first and second conductor blocks are exposed from the second principal surface.

Semiconductor apparatus, power module, and manufacturing method of semiconductor apparatus

A semiconductor device includes: a semiconductor substrate in which a cell region, an isolation region being a region which is located outward of the cell region, and a termination region including a guard ring region being located outward of the isolation region and an excess region being a region which is located outward of the guard ring region are defined; an insulating layer covering a top surface of the semiconductor substrate in the isolation region and the termination region; a surface electrode located on a portion of the top surface of the semiconductor substrate and a portion of a top surface of the insulating layer in the cell region and the isolation region; and a waterproof layer covering a portion of the insulating layer exposed from the surface electrode. The waterproof layer is spaced apart from the surface electrode.

Semiconductor device, semiconductor device manufacturing method, and power converter

Each of a plurality of semiconductor elements included in a semiconductor package includes a front-surface electrode being provided on a semiconductor substrate on a side opposite to a conductor substrate, a back-surface electrode being joined to the conductor substrate, a control pad configured to control current flowing between the front-surface electrode and the back-surface electrode, a frame being electrically connected to the front-surface electrode, a portion of the frame being exposed from a surface of a sealing material from which a lower surface of the conductor substrate is exposed, and a plurality of terminal blocks being electrically connected to a plurality of first pads, a portion of the plurality of terminal blocks being exposed from a surface of the sealing material, the surface being provided on a side opposite to the surface of the sealing material from which the lower surface of the conductor substrate is exposed.

An object of the present disclosure is to provide a method of manufacturing a semiconductor device capable of suppressing an electrostatic breakdown in a configuration including a semiconductor element with a sense cell part. A method of manufacturing a semiconductor device according to the present disclosure includes: bonding each of semiconductor elementsand a relay substrate on a conductor plate; connecting each of signal pads of each of the semiconductor elements and each of control pads of the relay substrate by a wire; bonding a first electrode material on each of the semiconductor elements; bonding a second electrode material on the relay substrate; sealing the conductor plate, each of the semiconductor elements, the relay substrate, the first electrode material, and the second electrode material by a sealing resin; and grinding the sealing resin and removing the shorting part to expose part of the second electrode material.

Method of manufacturing semiconductor device

A semiconductor device according to the disclosure includes a first semiconductor chip, a second semiconductor chip, a first metal plate provided on an upper surface of the first semiconductor chip, a second metal plate provided on an upper surface of the second semiconductor chip and a sealing resin covering the first semiconductor chip, the second semiconductor chip, the first metal plate and the second metal plate, wherein a groove is formed in the sealing resin, the groove extending downwards from an upper surface of the sealing resin, the first metal plate includes, at an end facing the second metal plate, a first exposed portion exposed from a side face of the sealing resin forming the groove, and the second metal plate includes, at an end facing the first metal plate, a second exposed portion exposed from a side face of the sealing resin forming the groove.

Semiconductor package with a plurality of chips having a groove in the encapsulation

A semiconductor device (-) and a wiring device () are provided on a main surface of a base plate (). A first wire (-) connects an external electrode (-) and a first relay pad (-) of the wiring device (). A second wire (-) connects a pad (-) of the semiconductor device (-) and the second relay pad (-) of the wiring device (). Resin () seals the semiconductor device (-), the wiring device () and the first and second wires (--). The second wire (-) is thinner than the first wire (-). The pad (-) is smaller than the first relay pad (-).

Semiconductor module

The semiconductor device includes a substrate, a semiconductor element bonded to the substrate, and a sealing resin sealing at least a part of the substrate and the semiconductor element, in which the semiconductor element includes an active region through which a main current flows in an ON state of the semiconductor element, a terminal region surrounding the active region, an anchor film provided on an insulating film of the terminal region, and a protective film covering at least the terminal region including the anchor film, and the anchor film consists of a material different from the insulating film and has a plurality of openings provided discretely.

Semiconductor device and semiconductor element

A semiconductor device manufacturing method includes processes of: applying a protective film precursor solution over an end of each of a plurality of semiconductor element structures and a side surface and a bottom surface of a groove; roughly drying a solvent in the protective film precursor solution to form a protective film; and performing full-curing to evaporate a solvent in the protective film after a process of cutting between the plurality of semiconductor element structures or a process of peeling a plurality of semiconductor elements from a dicing tape.

Semiconductor device manufacturing method

Provided is a method for manufacturing a semiconductor device that improves the reliability of the semiconductor device under thermal stress and the assembly performance of the semiconductor device in manufacturing steps. The method includes the following: forming a first electrode by depositing a first conductive film onto one main surface of a semiconductor substrate and patterning the first conductive film; forming a first metal film corresponding to a pattern of the first electrode onto the first electrode; forming a second electrode by depositing a second conductive film onto the other main surface of the semiconductor substrate; forming a second metal film thinner than the first metal film onto the second electrode; and collectively forming a third metal film onto each of the first metal film and the second metal film by electroless plating.

Method for manufacturing semiconductor device

In the semiconductor device, a screw has a head section embedded in a case groove section provided in a frame placing stage of a case to cause side and front surfaces of the head section to be covered by the case, thereby fixing the screw to the case. A threaded section passes through a frame through hole of a frame exposed section disposed above the head section to protrude upward to be exposed on a side facing away from the base plate.

Semiconductor device, production method therefor, and automobile

The present invention relates to a control circuit controlling a switching device. The control circuit is a control circuit controlling first and second switching devices which are serially connected between first potential and second potential lower than the first potential and operate in a complementary manner. The control circuit includes a first control circuit controlling the first switching device and a second control circuit controlling the second switching device, and performs variable control of a circuit constant of each of the first and second control circuits based on a temperature of one of the first and second switching devices.

Growing community of inventors

Tokyo, Japan

Yosuke Nakata