Panasonic Intellectual Property Management Co., Ltd.

Panasonic Corporation

Matsushita Electric Works, Ltd.

Yosuke Hagihara

Kazushi Yoshida

Katsumi Kakimoto

Takafumi Okudo

Naoki Ushiyama

Koji Tsuji

Akira Matsuura

Ryo Osabe

Yoichi Nishijima

Takumi Taura

Masaaki Saito

Kazushi Tomii

Sumio Akai

Yasufumi Shibata

Hideo Nagahama

A capacitor includes a silicon substrate, a first terminal, a dielectric layer, a conductive portion, and a second terminal. The silicon substrate has a principal surface and a porous part. The principal surface includes an opening region and a non-opening region other than the opening region. The porous part has an opening in the opening region. The first terminal is electrically connected to the silicon substrate. The dielectric layer is formed on an inner surface of the porous part. The conductive portion is filled, on the dielectric layer, in the porous part. The second terminal is electrically connected to the conductive portion. At least one of the first terminal or the second terminal overlaps at least part of the porous part in the normal direction of the principal surface.

Capacitor

A capacitor includes a silicon substrate, a conductor layer, and a dielectric layer. The silicon substrate has a principal surface including a capacitance generation region and a non-capacitance generation region. The silicon substrate includes a porous part provided in a thickness direction in the capacitance generation region. The conductor layer includes a surface layer part at least covering part of a surface of the capacitance generation region and a filling part filled in at least part of the porous part. The dielectric layer is provided between an inner surface of the porous part and the filling part. The porous part includes a macroporous part having macro pores and a nanoporous part formed in at least part of inner surfaces of the macro pores and having nano pores smaller than the macro pores.

Capacitor and method for producing same

A capacitor includes a silicon substrate, a conductor layer, and a dielectric layer. The silicon substrate has a principal surface including a capacitance generation region and a non-capacitance generation region. The silicon substrate has a porous part provided in a thickness direction in the capacitance generation region. The conductor layer has a surface layer part at least covering part of a surface of the capacitance generation region and a filling part filled in at least part of fine pores of the porous part. The dielectric layer is provided between an inner surface of the fine pores and the filling part.

The disclosure has a configuration including: a supporting substrate having a cavity; at least one bridge section extending directly above the cavity and having at least one end supported by the supporting substrate and an other end; and a thermopile wiring formed in the bridge section and including hot junctions in the bridge section and cold junctions directly above the supporting substrate, the hot junctions being connected to the cold junctions. The bridge section is provided with: at least one breakage detection wiring for detecting breakage of the bridge section; and at least one heater wiring. The breakage detection wiring is wired along the thermopile wiring. The heater wiring is wired such that part of the heater wiring is in an area between the other end of the bridge section and the hot junctions.

Infrared sensor chip, and infrared sensor employing same

An infrared sensor, which achieves a low manufacturing cost, or has high sensitivity, or in which an increase in heat capacity is reduced, is provided. The infrared sensor includes a first infrared absorbing portion, an infrared sensing portion for sensing infrared rays based on infrared rays absorbed by the first infrared absorbing portion, and a plurality of protrusions including metal and disposed apart from each other on a surface of the first infrared absorbing portion. Since an absorption rate of infrared rays is improved, sensitivity can be improved, or an increase in heat capacity can be reduced.

Infrared sensor having improved sensitivity and reduced heat generation

The infrared sensor () includes a base (), and an infrared detection element () formed over a surface of the base (). The infrared detection element () comprises an infrared absorption member () in the form of a thin film configured to absorb infrared, and a temperature detection member () configured to measure a temperature difference between the infrared absorption member () and the base (). The temperature detection member () includes a p-type polysilicon layer () formed over the infrared absorption member () and the base (), an n-type polysilicon layer () formed over the infrared absorption member () and the base () without contact with the p-type polysilicon layer (), and a connection layer () configured to electrically connect the p-type polysilicon layer () to the n-type polysilicon layer (). Each of the p-type polysilicon layer () and the n-type polysilicon layer () has an impurity concentration in a range of 10to 10cm. The p-type polysilicon layer () has its thickness of &#x3bb;/4n, wherein &#x3bb; denotes a center wavelength of the infrared to be detected by the infrared detection element (), and ndenotes a reflective index of the p-type polysilicon layer (). The n-type polysilicon layer () has its thickness of &#x3bb;/4n, wherein ndenotes a reflective index of the n-type polysilicon layer ().

Infrared sensor

An improved light responsive semiconductor switch with shorted load protection capable of successfully interrupting a load overcurrent. The switch is includes an output transistor which is triggered by a photovoltaic element to connect a load to a power source thereof, and an overcurrent sensor which provides an overcurrent signal upon seeing an overcurrent condition in the load. A shunt transistor is connected in series with a current limiting resistive element across the photovoltaic element to define a shunt path of flowing the current from the photovoltaic element through the current limiting resistive element away from the output transistor. A latch circuit is included to be energized by the photovoltaic element and to provide an interruption signal once the overcurrent signal is received and hold the interruption signal. The interruption signal turns on the shunt transistor so as to flow the current from the photovoltaic element through the shunt path, thereby turning off the output transistor for interruption of the overcurrent. The current limiting resistive element is connected in series with the shunt transistor to limit the current from the photovoltaic element when the shunt transistor is turned on, thereby providing a supply voltage from the photovoltaic element to the latch circuit. Thus, the latch circuit is enabled to keep providing the interruption signal for reliable interruption of the overcurrent.

Growing community of inventors

Osaka, Japan

Yosuke Hagihara