Galileo Technologies Ltd.

Yosi Sholt

David Shemla

Avigdor Willenz

Eyal Waldman

A switched Ethernet controller (SEC) device and associated method that provides processor based intervention in the packet routing decision process is provided. The method of routing a multicast packet between a source port on a source device and a plurality of destination ports on a plurality of destination devices, utilizes a processor. The method includes the steps of the source device receiving the multicast packet via the source port, the source device sending the multicast packet to the processor, the processor examining the multicast packet, the processor determining the plurality of destination devices and corresponding the plurality of destination ports based on the results obtained during the step of examining, the processor transferring the multicast packet to the plurality of destination devices, and the plurality of destination devices sending the multicast packet to the plurality of destination ports.

Switching ethernet controller providing packet routing

A write-only data transfer protocol for peripheral component interface busses and a method for transferring data between source and destination communication units is provided. The method includes the source communication unit writing a buffer allocation request to the destination unit and, in response to the buffer allocation request, the destination communication unit allocating space within an associated buffer to receive the data to be sent. The method also includes the destination communication unit writing at least the location of the allocated buffer to the source communication unit and the source communication unit writing the data to be sent to the allocated buffer location.

Bus protocol

A method and apparatus for managing packet memory is provided The apparatus includes an empty list, a storage buffer and apparatus for updating the storage buffer and empty list. The empty list includes a multiplicity of single bit buffers. The storage buffer includes a multiplicity of contiguous buffers, wherein each single bit buffer is associated with one of the contiguous buffers. The state of the bit of a single bit buffer indicates the empty or full state of the associated contiguous buffer and the address of a contiguous buffer is a simple function of the address or number of its associated single bit buffer. The updating apparatus stores data in and removes data from the contiguous buffers and correspondingly updates the states of the associated single bits buffers.

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Haifa, Israel

Yosi Sholt