Seiko Epson Corporation

Yoshiyuki Terashima

Atsushi Matsuo

Akira Uematsu

Yoichi Sato

Masami Katsui

To provide an optical sensor, an electronic apparatus, etc. that suppress reduction of spectroscopic characteristics. The optical sensor includes a light receiving element, an optical filterthat transmits a light having a specific wavelength of incident lights with respect to a light receiving region of the light receiving element, and an angle limiting filterthat limits an incident angle of the incident light transmitted through the optical filter

Optical sensor and electronic apparatus

An optical sensor includes a light receiving element (for example a photodiode) and an angle limiting filter that limits the incidence angle of incidence light with respect to the light receiving area of the light receiving element. When a wavelength of the incidence light is denoted by &#x3bb;, a height of the angle limiting filter is denoted by R, and a width of an opening of the angle limiting filter is denoted by d, 'd/&#x3bb;R&#x2267;2' is satisfied.

Optical sensor and electronic apparatus utilizing an angle limiting filter

An optical sensor includes an impurity region for a photodiode and an angle limiting filter limiting the incidence angle of incidence light incident to a light receiving area of the photodiode, which are formed on a semiconductor substrate. The angle limiting filter is formed by at least a first plug corresponding to a first insulating layer and a second plug corresponding to a second insulating layer located in an upper layer of the first insulating layer. Between the first plug and the second plug, there is a gap area having a gap space that is equal to or less than &#x3bb;/2.

A device for reading sound waveform data has a waveform ROM for storing waveform data represented as an amplitude in a time series. Sound waveform data is repeatedly read from the waveform ROM. The reading of a single waveform corresponds to a single period. A scale ROM stores a plurality of frequency dividing ratios. A programmable counter divides a signal having a predetermined frequency in correspondence with a frequency dividing ratio output by the scale ROM and outputing a clock pulse. A counter counts the clock pulses and indicates the addresses of the waveform ROM. The scale ROM changes the frequency dividing ratio data during an arbitrary divided period of intervals in the period for reading the waveform data. During the period for reading the waveform by the counters, the sound waveform read out has a single frequency and accordingly a single period. The waveform reading period is divided into m number of intervals. A particular kth divided period interval between 0 and m is adjusted to a longer or shorter interval than the remaining m-1 period intervals to allow fine adjustment of an average period improving overall period resolution capabilities.

Device and method for reading sound waveform data

A sound generating device for generating a variety of sounds has a main control circuit which includes a ROM for storing melody data. A sound source is coupled to the control circuit in accordance with sound scale data stored in the ROM. The sound source has a waveform memory for storing a sound waveform in a digital form. The sound waveform memory is read at a frequency corresponding to the sound scale data. An envelope waveform memory stores an envelope waveform in a digital form. A digital to analog conversion circuit converts the digital envelope waveform in accordance with the digital sound waveform to produce an analog voltage.

Sound generating device for outputting sound signals having a sound

A device for reading sound waveform data has a waveform ROM for storing waveform data represented as an amplitude in a time series. Sound waveform data is repeatedly read from the waveform ROM. The reading of a single waveform corresponds to a single period. A scale ROM stores a plurality of frequency dividing ratios. A programmable counter divides a signal having a predetermined frequency in correspondence with a frequency dividing ratio output by the scale ROM and outputing a clock pulse. A counter counts the clock pulses and indicates the addresses of the waveform ROM. The scale ROM changes the frequency dividing ratio data during an arbitrary divided period of intervals in the period for reading the waveform data. During the period for reading the waveform by the counters, the sound waveform readout has a single frequency and accordingly a single period. The waveform reading period is devided into m number of intervals. A particular kth divided period interval between 0 and m is adjusted to a longer or shorter interval than the remaining m-1 period intervals to allow fine adjustment of an average period improving overall period resolution capabilities.

Device for reading sound waveform data

A voltage regulator forms a constant voltage based on the sum voltage of the threshold voltages of multiple transistors comprising multiple first transistors with mutually different threshold voltages, a first switch to select a first transistor output from the multiple first transistors, multiple second transistors with mutually different threshold voltages and a second switch to select a second transistor from the multiple second transistors, and a summing circuit connected to the multiple first and second transistors for providing a sum voltage from the threshold voltages of the selected first and second transistors. Alternatively, the voltage output of a single transistor in lieu of one of said multiple transistor groups and may be combined with the output voltage of a selected transistor from the other multiple transistor group for input to the summing circuit.

Voltage regulator

A non-volatile memory circuit which may be formed on the same memory chip as a MOS integrated circuit for an electronic watch. The non-volatile memory circuit includes a power source and a high voltage application terminal for writing data. A non-volatile memory device is coupled between the power source and the high voltage application terminal. A voltage limiting circuit for limiting the voltage applied to the non-volatile memory is coupled between the power source and the high voltage application terminal. A current limiting circuit for limiting the current applied to the non-volatile memory is coupled between the high voltage application terminal and the non-volatile memory, whereby the non-volatile memory is protected from stray voltage and current writing data into the non-volatile memory. The invention may also be applied to an EEPROM arrangement in which the data may be read to or erased from the non-volatile memory without erroneous writing or erasure due to static noise or other outside noise.

Growing community of inventors

Suwa, Japan

Yoshiyuki Terashima