Mitsubishi Denki Kabushiki Kaisha

Renesas Electronics Corporation

Nippon Steel Corporation

Joled Inc.

Mitsubishi Electric Semiconductor Software Co., Ltd

Kyocera Elco Corporation

Yoshiyuki Ota

Atsuhiko Ishibashi

Masashi Ishii

Yasushi Hayakawa

Takanori Hirota

Takeshi Oshita

Yoshiaki Ito

Yuichiro Ishii

Takahiro Komatsu

Atsushi Miyanishi

Kosuke Mishima

Ichiro Tomioka

Yoshiyuki Nakao

Junko Tanaka

Toshiyuki Suzuma

Hiroshi Katagiri

Masaki Sakaoka

Eiji Murakami

A device of detecting magnetic characteristic change for a long material includes: an exciting coil into which the long material is inserted and which magnetizes the long material in a longitudinal direction; a detecting coil into which the long material is inserted and which detects a magnetic flux generated in the long material due to magnetization by the exciting coil; and a yoke member which has a first opening portion which is positioned on one side of the long material in the longitudinal direction and into which the long material is inserted and a second opening portion which is positioned on the other side of the long material in the longitudinal direction and into which the long material is inserted, and has a shape which is substantially axially symmetrical about an axis passing the first opening portion and the second opening portion, and the exciting coil and the detecting coil are surrounded by the yoke member, the first opening portion, and the second opening portion.

Device and method of detecting magnetic characteristic change for long material

An organic electroluminescence (EL) element including an anode, a cathode opposing the anode, a light-emitting layer between the anode and the cathode, a hole transport layer in contact with the light-emitting layer, between the light-emitting layer and the anode, and an electron transport layer in contact with the light-emitting layer, between the light-emitting layer and the cathode. A difference between a lowest unoccupied molecular orbital (LUMO) level of an organic material included in the light-emitting layer and a LUMO level of an organic material included in the electron transport layer is greater than a difference between a highest occupied molecular orbital (HOMO) level of an organic material included in the hole transport layer and a HOMO level of the organic material included in the light-emitting layer.

Organic EL element

A phase comparison circuit detects a phase difference between a data signal and the output from a variable delay circuit. A Code Operator detects a value of a control code corresponding to a delay equal to one period of an output clock. Then, when a delay amount of the variable delay circuit exceeds one period of a clock during synchronization of the output clock with the data signal while the control code is changed in accordance with the detection result by the phase delay circuit, a control code corresponding to a delay equal to one period of the output clock is added or subtracted to/from the control code at a time. Therefore, even if there is a difference in frequency between a data signal and a clock, it becomes possible to synchronize the data signal and the clock with application of the same clock phase.

Clock data recovery circuit capable of generating clock signal synchronized with data signal

A voltage-controlled oscillating circuit according to the present invention includes: a bias voltage generating circuit outputting a bias voltage according to a control voltage; and a ring oscillator circuit receiving supply of the bias voltage to operate. The bias voltage generating circuit generates the bias voltage using a feedback circuit formed by an operational amplifier receiving supply of a power source voltage to operate. Therefore, an influence of a high frequency component overlapped on the power source voltage, that is an influence of noise, is suppressed, thereby enabling stable generation of an output clock having a small variation in phase.

VCO circuit with wide output frequency range and PLL circuit with the VCO circuit

A pulse generation circuit ( ) generates a pulse signal (S ) of &ldquo;L&rdquo; with a rise of a clock signal (CLOCK) as a trigger. A latch circuit ( ) changes a latch signal (S ) fry &ldquo;L&rdquo; to &ldquo;H&rdquo; on the basis of the pulse signal ( ) of &ldquo;L&rdquo;. Inverters (G , G ) output a signal (XDEC) on the basis of the latch signal (S ). Even when the generation of the &ldquo;L&rdquo; pulse of the pulse signal (S ) is terminated and the pulse signal (S ) returns to &ldquo;H&rdquo;, the latch circuit ( ) is in a data holding state to sustain the latch signal (S ) of &ldquo;H&rdquo; during a period while the signal READY takes &ldquo;H&rdquo;. With this constitution, it is possible to provide a semiconductor integrated circuit having a control unit which can output an operation control signal in synchronization with the clock signal without being constrained by the time length of &ldquo;H&rdquo; (&ldquo;L&rdquo;) period of the clock signal.

Semiconductor integrated circuit

There is provided a current mirror circuit which suppresses variations in an output current resulting from the Early effect. A pair of transistors (T,, T,) of a conventional current mirror circuit have gates connected to each other, and sources connected to each other, with the gate and drain of one of the transistors short-circuited. The source and drain of the other transistor (T,) on an output current side are connected to the source and gate of a transistor (T,), respectively. The sources of all of the transistors (T,, T,, T,) are commonly connected to a constant current circuit comprised of a bias voltage generating circuit (VB,) and a transistor (T,). A bias point is determined so that the increase/decrease in a current (Iout) causes the increase/decrease in a current (Icom), and the sizes of the respective transistors are designed.

Current mirror circuit and charge pump circuit

A buffer circuit with driving current adjusting function is provided which may automatically set a driving current characteristics of a buffer to the most suitable value according to a system where the driving current is to be applied. A buffer circuit with driving current adjusting function of the present invention comprises a buffer circuit which is controlled by a control signal for supplying a most appropriate driving current to a load; a load detecting circuit for detecting a phase difference between an input signal and an output signal of the buffer circuit and for outputting voltage corresponding to the phase difference, a control signal generating circuit for generating a signal which controls the driving current of the buffer circuit in response to an output signal of the load detecting circuit, the control signal controls so that the driving current of buffer circuit is increased when delay time of buffer circuit becomes long and the driving current of buffer circuit is decreased when delay time becomes short.

Buffer circuit for regulating driving current

A memory card connector assembly superimposed on a substrate includes a plurality of memory card connectors stacked on top of each other whose contacts are to be connected to corresponding terminals of associated memory cards. The contacts of a lowermost memory card connector are soldered to the substrate, and the contacts of at least one upper memory card connector are connected to an FPC board.

Memory card connector

Growing community of inventors

Tokyo, Japan

Yoshiyuki Ota