Semiconductor Energy Laboratory Co., Ltd.

Yoshiyuki Kurokawa

Takayuki Ikeda

Munehiro Kozuma

Shunpei Yamazaki

Takeshi Aoki

Hikaru Tamura

Yuki Okamoto

Daisuke Kawae

Takashi Nakagawa

Hiromichi Godo

Satoshi Kobayashi

Hajime Kimura

Hiroki Inoue

Takayuki Inoue

Masami Endo

Masataka Ikeda

Shintaro Harada

Tatsunori Inoue

Hidekazu Miyairi

Yutaka Shionoiri

Hiroki Dembo

Satoru Ohshita

Jun Koyama

Kiyoshi Kato

Kei Takahashi

Takeshi Osada

Kouhei Toyotaka

Tomoaki Atsumi

Seiichi Yoneda

Masato Ishii

Kazuki Tsuda

Fumika Akasawa

Hidefumi Rikimaru

Yasuhiko Takemura

Masayuki Sakakura

Yasuhiro Jinbo

Koji Dairiki

Hidetomo Kobayashi

Konami Izumi

Hisao Ikeda

Takuro Ohmaru

Yukie Suzuki

Yusuke Negoro

Roh Yamamoto

Kiyotaka Kimura

Takuro Kanemura

Yasuyuki Arai

Atsuo Isobe

Hideki Uochi

Koji Kusunoki

Atsushi Miyaguchi

Takuya Tsurume

Takashi Hamada

Masashi Fujita

Yuto Yakubo

Yoshitaka Moriya

Yosuke Tsukamoto

Seiko Inoue

Katsuki Yanagawa

Etsuko Arakawa

Kazuko Yamawaki

Hideaki Kuwabara

Naoto Kusumoto

Daisuke Kubota

Akihisa Shimomura

Kosei Noda

Tetsuji Ishitani

Kensuke Yoshizumi

Hitoshi Kunitake

Kazuaki Ohshima

Toshiki Hamada

Jiro Imada

Noriko Harima

Syusuke Iwata

Shoki Miyata

Nora Bjorklund

Noriko Matsumoto

A display apparatus having a novel structure is provided. A plurality of display panels, a fixing member having a curved surface, and a housing storing the fixing member are included. The display panel includes a display portion including a pixel circuit, a non-display portion provided to surround the display portion, a gate driver circuit for driving the pixel circuit, and a source driver circuit. The gate driver circuit is provided at a position overlapping with the display portion. The source driver circuit is provided at a position overlapping with the non-display portion. The plurality of display panels are fixed along the curved surface of the fixing member.

Display apparatus

A semiconductor device that can perform product-sum operation with low power consumption is provided. The semiconductor device includes first and second circuits. The first circuit includes a first holding node and the second circuit includes a second holding node. The first circuit is electrically connected to first and second input wirings and first and second wirings, the second circuit is electrically connected to the first and second input wirings and the first and second wirings, and the first and second circuits have a function of holding first and second potentials corresponding to first data at the first and second holding nodes. When potentials corresponding to second data are input to the first and second input wirings, the first circuit outputs a current to one of the first wiring and the second wiring, and the second circuit outputs a current to the other of the first wiring and the second wiring. The currents output by the first and second circuits to the first wiring and the second wiring are determined in accordance with the first and second potentials held at the first and second nodes.

Semiconductor device that can perform product-sum operation with low power consumption

An electronic device capable of gaze tracking is provided. The electronic device includes a display apparatus, an image processing portion, and a control portion. The display apparatus includes a light-emitting device and a light-receiving device. The light-emitting device has a function of emitting light to a user's eye as a display image. The light-receiving device has a function of capturing a retina of the user's eye as a captured image. The image processing portion has a function of detecting a macula included in the retina from the captured image and a function of calculating position data of the macula. The control portion has a function of obtaining a position of a user's gaze destination on the display image from the position data of the macula.

Electronic device and operation method of the electronic device

A semiconductor device having a novel structure is provided. The semiconductor device includes memory layers and a driver circuit layer. The memory layers are stacked over the driver circuit layer and each include a memory cell array including a plurality of memory cells. Writing or reading of data to or from one of the memory cells is controlled with a write word line, a read word line, a write bit line, and a read bit line. The driver circuit layer includes a driver circuit portion configured to drive the write word line, the read word line, the write bit line, and the read bit line; and an arithmetic circuit portion. The driver circuit portion includes a plurality of driver circuits configured to control data writing or reading on the memory cell array basis. The arithmetic circuit portion is a circuit configured to perform arithmetic processing using the data retained in the memory cell array provided in each of the memory layers and read through the driver circuit portion.

Semiconductor device

A driving method of a semiconductor device that takes three-dimensional images with short duration is provided. In a first step, a light source starts to emit light, and first potential corresponding to the total amount of light received by a first photoelectric conversion element and a second photoelectric conversion element is written to a first charge accumulation region. In a second step, the light source stops emitting light and second potential corresponding to the total amount of light received by the first photoelectric conversion element and the second photoelectric conversion element is written to a second charge accumulation region. In a third step, first data corresponding to the potential written to the first charge accumulation region is read. In a fourth step, second data corresponding to the potential written to the second charge accumulation region is read.

Driving method of semiconductor device and electronic device

A semiconductor device that can perform product-sum operation with low power consumption is provided. The semiconductor device includes first and second circuits; the first circuit includes a first holding node and the second circuit includes a second holding node. The first circuit is electrically connected to first and second input wirings and first and second wirings, the second circuit is electrically connected to the first and second input wirings and the first and second wirings, and the first and second circuits each have a function of holding first and second potentials corresponding to first data at the first and second holding nodes. When a potential corresponding to second data is input to each of the first and second input wirings, the first circuit outputs a current to one of the first wiring and the second wiring and the second circuit outputs a current to the other of the first wiring and the second wiring. The currents output from the first and second circuits to the first wiring or the second wiring are determined in accordance with the first and second potentials held at the first and second holding nodes.

Semiconductor device and electronic device

A neuron circuit can switch between two functions: as an input neuron circuit, and as a hidden neuron circuit. An error circuit can switch between two functions: as a hidden error circuit, and as an output neuron circuit. A switching circuit is configured to be capable of changing the connections between the neuron circuit, a synapse circuit, and the error circuit. The synapse circuit includes an analog memory that stores data that corresponds to the connection strength between the input neuron circuit and the hidden neuron circuit or between the hidden neuron circuit and the output neuron circuit, a writing circuit that changes the data in the analog memory, and a weighting circuit that weights an input signal in reaction to the data of the analog memory and outputs the weighted output signal. The analog memory includes a transistor comprising an oxide semiconductor with extremely low off-state current.

A semiconductor device capable of performing product-sum operation with high layout flexibility is provided. In the semiconductor device, a first layer, a second layer, and a third layer are formed in this order. The first layer includes a first cell, a first circuit, a first wiring, and a second wiring adjacent to the first wiring. The second layer includes a third wiring and a fourth wiring adjacent to the third wiring. The third layer includes an electrode and a sensor. The first circuit includes a switch. The sensor is electrically connected to the third wiring through the electrode and a first plug, a first terminal of the switch is electrically connected to the third wiring through a second plug, and a second terminal of the switch is electrically connected to the first cell through the first wiring. The electrode includes a region overlapping with the sensor and a region overlapping with the first plug. Note that the first to fourth wirings are parallel to each other, and the distance between the third wiring and the fourth wiring is greater than or equal to 0.9 times and less than or equal to 1.1 times the distance between the first wiring and the second wiring.

In a CMOS image sensor in which a plurality of pixels is arranged in a matrix, a transistor in which a channel formation region includes an oxide semiconductor is used for each of a charge accumulation control transistor and a reset transistor which are in a pixel portion. After a reset operation of the signal charge accumulation portion is performed in all the pixels arranged in the matrix, a charge accumulation operation by the photodiode is performed in all the pixels, and a read operation of a signal from the pixel is performed per row. Accordingly, an image can be taken without a distortion.

Semiconductor device and manufacturing method thereof

To provide a novel electronic device. The electronic device includes a housing and a display device. The display device includes a first layer, a second layer, and a third layer. The first layer, the second layer, and the third layer are provided in different layers. The first layer includes a driver circuit and an arithmetic circuit. The second layer includes pixel circuits and a cell array. The third layer includes light-receiving devices and light-emitting devices. The pixel circuits each have a function of controlling light emission of the light-emitting device. The driver circuit has a function of controlling the pixel circuits. The arithmetic circuit has a function of performing arithmetic processing on the basis of first data corresponding to currents output from the light-receiving devices and second data corresponding to a potential held in the cell array.

Electronic device

A high-resolution display apparatus having a function of sensing light is provided. The display apparatus includes a display portion in which a first arrangement pattern and a second arrangement pattern are repeatedly arranged in this order in a first direction. In the first arrangement pattern, a first subpixel, a second subpixel, and a third subpixel are repeatedly arranged in this order in a second direction. In the second arrangement pattern, a fourth subpixel and a fifth subpixel are repeatedly arranged in this order in the second direction. The first to fourth subpixels each include a light-emitting device. The fifth subpixel includes a light-receiving device.

Display apparatus including light-emitting device and light-receiving device

A highly sensitive imaging device that can perform imaging even under a low illuminance condition is provided. One electrode of a photoelectric conversion element is electrically connected to one of a source electrode and a drain electrode of a first transistor and one of a source electrode and a drain electrode of a third transistor. The other of the source electrode and the drain electrode of the first transistor is electrically connected to a gate electrode of the second transistor. The other electrode of the photoelectric conversion element is electrically connected to a first wiring. A gate electrode of the first transistor is electrically connected to a second wiring. When a potential supplied to the first wiring is HVDD, the highest value of a potential supplied to the second wiring is lower than HVDD.

Imaging device and electronic device

A semiconductor device capable of convolutional processing with low power consumption is provided. In the semiconductor device, a first circuit includes a first holding portion and a first transistor, and a second circuit includes a second holding portion and a second transistor. The first and second circuits are electrically connected to first and second input wirings and first and second wirings. The first holding portion has a function of holding a first current flowing through the first transistor, and the second holding portion has a function of holding a second current flowing through the second transistor. The first and second currents are determined by a filter value used for convolutional processing. When a potential corresponding to image data subjected to convolutional processing is input to the first and second input wirings, the first circuit outputs a current to one of the first wiring and the second wiring and the second circuit outputs a current to the other of the first wiring and the second wiring. The amount of current output from the first and second circuits to the first wiring or the second wiring is determined by the filter value and the image data.

Semiconductor device electronic device

A novel display apparatus is provided. The display apparatus includes a first layer including a plurality of pixel circuits, a second layer provided over the first layer, a plurality of optical lenses provided over the second layer, a display region, and a plurality of light-receiving regions. The display region includes a first pixel circuit provided in the first layer and a light-emitting device provided in the second layer. The light-receiving region includes a second pixel circuit provided in the first layer and a light-receiving device provided in the second layer. The plurality of light-receiving regions are provided around the display region. The optical lens is provided at a position overlapping with the light-receiving region.

Display apparatus and electronic device

An imaging device capable of image processing is provided. The imaging device can retain analog data (image data) obtained by an image-capturing operation in a pixel and perform a product-sum operation of the analog data and a predetermined weight coefficient in the pixel to convert the data into binary data. When the binary data is taken in a neural network or the like, processing such as image recognition can be performed. Since enormous volumes of image data can be retained in pixels in the state of analog data, processing can be performed efficiently.

Growing community of inventors

Kanagawa, Japan

Yoshiyuki Kurokawa