Renesas Electronics Corporation

Hitachi, Ltd.

Renesas Technology Corp.

Other

Yoshiyuki Kado

Takahiro Naito

Toshihiko Sato

Takafumi Kikuchi

Hikaru Ikegami

Ikuo Yoshida

Hiroshi Kikuchi

Mitsuaki Katagiri

Yuji Shirai

Tsukio Funaki

Hideo Miura

Naotaka Tanaka

Satoshi Imasu

Kazuyuki Taguchi

Norio Kishikawa

Of three chips (A), (B), and (C) mounted on a main surface of a package substrate () in a multi-chip module (MCM), a chip (A) with a DRAM formed thereon and a chip (B) with a flash memory formed thereon are electrically connected to wiring lines () of the package substrate () through Au bumps (), and a gap formed between main surfaces (lower surfaces) of the chips (A), (B) and a main surface of the package substrate () is filled with an under-fill resin (). A chip (C) with a high-speed microprocessor formed thereon is mounted over the two chips (A) and (B) and is electrically connected to bonding pads () of the package substrate () through Au wires ().

Semiconductor device and manufacturing method thereof

Method of manufacturing semiconductor device

With respect to two types of chips to be mounted on a main surface of a package substrate, the ratio of chip area to the number of terminals of one chip and that of the other chip are compared with each other and the chip smaller in the ratio is mounted by the wire bonding method, while the chip larger in the ratio is mounted by the flip-chip method. It is possible to reduce the cost of manufacturing a multi-chip module wherein plural types of chips having different terminal pitches are mounted on a wiring substrate.

Semiconductor device and a method of manufacturing the same

Silicon chip having narrow pitches of Au bumps are mounted on a module substrate in such a way that while taking into consideration a difference in coefficient of thermal expansion between the silicon chip and the module substrate, a total pitch of electrode pads of the silicon chip is made narrower than a total pitch of the Au bumps, thereby preventing misregistration between the Au bumps and the electrode pads in the course of heat treatment to ensure reliable contact therebetween.

Method of manufacturing a multi-chip module

A technique to be applied to improve the reliability of a magnetic disk apparatus is disclosed. In detail, a magnetic disk apparatus comprises a disk-shaped magnetic recording medium that rotates in operation, a magnetic head for writing the data in the magnetic recording medium and for reading out the data written in the magnetic recording medium, a carriage mechanism having an arm on which the magnetic head is located and moving the magnetic head to an arbitrary position on the magnetic recording medium, a wiring member having wiring, a semiconductor chip having a first main surface and a second main surface that are opposed to each other and electrodes formed on the first main surface, the semiconductor chip being fixed to the wiring member in the state that the electrodes are facing to the wiring of the wiring member, and a housing that contains the magnetic recording medium, the magnetic head, the carriage mechanism, the wiring member, and the semiconductor chip, wherein the edge of the first main surface side of the semiconductor chip and the edge of the second main surface side are covered with insulative resin.

Magnetic disk apparatus

In order to realize a semiconductor device and a manufacturing method thereof which can keep with a high reliability an electric connection between each of bump pads formed on LSI chips and each of electrode pads formed on an interconnection substrate, within an guaranteed temperature range, a thermal expansion coefficient of an adhesive ( ) is in the range of 20 to 60 ppm, and an elastic modulus of a build-up portion ( ) is in the range of 5 to 10 GPa. Further, the build-up portion ( ) is constituted by a multi-layer build-up substrate in which buid-up portion a peak value (a glass transition temperature) of a loss coefficient exists within a range of 100&deg; C. to 250&deg; C. and does not exist within a range of 0&deg; C. to 100&deg; C. By setting or selecting the physical properties in the manner disclosed above, it is possible to realize a semiconductor device and a manufacturing method thereof which can keep with a high reliability an electric bonding between the bump pads ( ) formed on the LSI chips ( ) and the electrode pads ( ) on the interconnection substrate ( ) within an guaranteed temperature range.

Semiconductor device

Disclosed herein is a semiconductor device, which comprises a semiconductor chip including, over one main surface thereof, first wirings, protective films formed so as to cover other portions excluding parts of the first wirings, flexible layers respectively formed on the protective films so as to exclude the parts of the first wirings, and second wirings having first portions respectively electrically connected to the parts of the first wirings, and second portions respectively drawn onto the flexible layers; a wiring board having third wirings over one main surface thereof; and an adhesive comprising a large number of conductive particles contained in an insulative resin, and wherein the semiconductor chip is bonded to the wiring board with the adhesive interposed therebetween in a state in which the one main surface thereof is face to face with the one main surface of the wiring board, and the second portions of the second wirings are respectively electrically connected to the third wirings with some of the large number of conductive particles interposed therebetween.

Semiconductor device its manufacturing method and electronic device

An electronic device comprising: a semiconductor chip having plural electrode pads on one main surface thereof; a wiring board having plural connection parts; and plural salient electrodes disposed respectively between the electrode pads of the semiconductor chip and the connection parts of the wiring board to provide electrical connections between the two, the salient electrodes being arranged in an array not providing balance of the semiconductor chip with respect to one main surface of the wiring board, the plural connection parts of the wiring board being arranged at a deeper position than one main surface of the wiring board in a depth direction from the one main surface.

Growing community of inventors

Kodaira, Japan

Yoshiyuki Kado