Tokyo Electron Limited

Yoshitsugu Tanaka

Koji Yamashita

Junichi Kitagawa

Wataru Okase

Takuya Sugawara

Yasushi Yagi

Koji Akiyama

Takenobu Matsuo

Hiroshi Sato

Hiroki Taniyama

Satoshi Nakashima

Takashi Kobayashi

Hajime Nakabayashi

Yasushi Akasaka

Yoshiyuki Harima

Kyungho Park

Hirokazu Higashijima

Kenji Amano

Yoshinori Kato

Tameyasu Hyakuzuka

Jun Yamauchi

A select transistor for use in a memory device including a plurality of memory transistors connected in series includes a tunnel insulating layer formed on a semiconductor substrate, a charge storage layer formed on the tunnel insulating layer, a blocking insulating layer formed on the charge storage layer and configured to be irradiated with a gas cluster ion beam containing argon as source gas, a gate electrode formed on the blocking insulating layer, and a source/drain region formed within the semiconductor substrate at both sides of the gate electrode.

Select transistor, method for making select transistor, memory device, and method for manufacturing memory device

A disclosed fabrication method of a semiconductor device includes steps of depositing a dielectric film on a semiconductor substrate; thermally treating the dielectric film; and irradiating an ionized gas cluster onto the thermally treated dielectric film.

Fabrication method of semiconductor device

A disclosed temperature sensor includes a charge trap structure including a silicon oxide film formed on a substrate; an aluminum oxide film that is formed on the silicon oxide film, wherein oxygen is injected into the aluminum oxide film from an upper surface thereof; and an electrode formed on the aluminum oxide film, wherein a flat band voltage of the charge trap structure is temperature dependent.

Temperature sensor, method of manufacturing the temperature sensor, semiconductor device, method of manufacturing the semiconductor device, and method of controlling the semiconductor device

A method for manufacturing a fin-type field effect transistor simply and securely by using a SOI (Silicon On Insulator) wafer, capable of suppressing an undercut formation, is disclosed. The method includes forming a fin-shaped protrusion by selectively dry-etching a single crystalline silicon layer until an underlying buried oxide layer is exposed; forming a sacrificial oxide film by oxidizing a surface of the protrusion including a damage inflicted thereon; and forming a fin having a clean surface by removing the sacrificial oxide film by etching, wherein an etching rate rof the sacrificial oxide film is higher than an etching rate rof the buried oxide layer during the etching.

Manufacturing method of fin-type field effect transistor

Liquid treatment units are disposed in multi-tiers surrounding a main-arm . Among liquid treatment units, plating units M through M are disposed on a lower tier side, and a unit for post-treatment process such as a cleaning unit where a cleaner atmosphere is necessary is disposed on an upper tier side. Thereby, an improvement in an area efficiency and the formation and maintenance of a clean atmosphere can be simultaneously obtained.

Liquid treatment system and liquid treatment method

A plasma etching apparatus includes a process container formed of a container main body and an upper casing combined with each other. A detaching device is provided to move the upper casing between a mounted position where the upper casing is put on the container main body, and a retreated position where the upper casing is removed from the container main body. The detaching device supports the upper casing to be rotatable, movable up and down, and movable in a lateral direction, relative to the container main body. The retreated position is arranged such that the upper casing does not interfere with the container main body when the upper casing is rotated there.

Vacuum processing apparatus for semiconductor process

Growing community of inventors

Nirasaki, Japan

Yoshitsugu Tanaka