Panasonic Corporation

Matsushita Electric Industrial Co., Ltd.

Yoshito Shimizu

Noriaki Saito

Yoshifumi Hosokawa

Katsuaki Abe

Tadashi Morita

Tomoya Urushihara

Hiroyuki Yabuki

Michiaki Matsuo

Yohei Morishita

Takeaki Watanabe

Akihiko Matsuoka

Junji Sato

Atsushi Maruyama

Yoshito Nakanishi

Satoshi Tsukamoto

Kiyomichi Araki

Takafumi Nasu

Disclosed are a nonlinear distortion compensating receiver and nonlinear distortion compensation method, wherein nonlinear distortion is reduced with a simple circuit configuration. A correction (opposite characteristics) filter () has characteristics opposite that of the frequency characteristics of a direct sampling mixer () and corrects signals sampled by the direct sampling mixer (). In the main path, a LPF () extracts a frequency band component of a desired signal from the corrected signal. In the replica path, a BPF () extracts the frequency band component of a blocker signal from the corrected signal. A cubing circuit () uses the frequency band component of the blocker signal to generate a replica signal for the nonlinear distortion. An adaptive filter () performs filter processing on the replica signal while updating the filter coefficients. A subtractor () subtracts the output signal of the adaptive filter () from the frequency band component of the extracted desired signal and outputs the subtraction result as the desired signal.

Nonlinear distortion compensating receiver and nonlinear distortion compensation method

A sampling circuit and a receiver have a high level of filter design flexibility and excellent image rejection characteristics. Signals with phases that differ by 90&#xb0; are sampled using an IQ generating circuit and are weighted by each of multiple parallel-connected discrete-time circuits, and the result of addition by an output adding circuit is ultimately output. Alternatively, a configuration in which the multiple parallel-connected discrete-time circuits and the output adding circuit are cascade-connected is adopted, so that frequency characteristics having an attenuation pole to one side can be achieved and excellent image rejection characteristics can be obtained.

Sampling circuit and receiver utilizing the same

Disclosed is a harmonic rejection mixer that makes it possible to suppress high-frequency response, while keeping the number of gm elements from increasing. In a harmonic rejection mixer that regulates the waveform of an output signal by mixing outputs of multiple mixers that are connected in parallel with the latter stage of multiple gm elements, some of the gm elements are shared by I phase and Q phase by using a control signal with a duty ratio of less than 50% to drive at least some of the mixers, and then using the period in which the I-phase mixers are inactive to activate the Q-phase mixers.

Harmonic rejection mixer

Disclosed is a mixer able to simultaneously suppress self-mixing and low-order harmonic response in a charge sampling circuit. Specifically disclosed is a multiphase mixer provided with a transconductance amplifier () for converting a voltage signal into a current signal, an N number (where N is a natural number that is 2 or more) of first integrators () which are connected in parallel to the subsequent stage of the transconductance amplifier (), and a 2N number of mixers () connected in parallel in pairs to the respective N number of first integrators (), wherein two mixers connected to the same first integrator of any of the N number of first integrators () are controlled by driving signals comprised of pulse trains with the same frequency and phases differing by 180&#xb0;.

Multiphase mixer

A second-order distortion correcting receiver and a second-order distortion correcting method, wherein second-order inter-modulation distortion can be cancelled with high precision and with a simple circuit configuration, without requiring a complicated adjustment step. A non-linear active element unit () performs non-linear processing on an input signal to output a differential output signal and common mode output signal. A common mode detection unit () extracts the common mode output signal. A weighting unit () weights the extracted common mode output signal and thereby generates a corrected signal. A corrected signal injection unit () injects the corrected signal into a differential output signal to output a corrected differential output signal. A DC detection unit () calculates the average DC component of the corrected differential output signal. A weight determining unit () uses the average DC component to determine the weighting coefficient used by the weighting unit (). At this time, the weight determining unit () sets, as the weighting coefficient, the coefficient that reduces the average DC component included in the corrected differential output signal to zero.

Second-order distortion correcting receiver and second-order distortion correcting method

An object of the invention is to provide a multimode polar modulation device and a multimode radio communication method for making it possible to decrease the distortion compensation processing data capacity while maintaining the distortion compensation accuracy and also making it possible to efficiently store the distortion compensation processing data corresponding to a multimode modulation signal adaptively acquired in memory. At the distortion compensation coefficient calibration operation time of a polar modulation circuit, a control sectionselects a modulation signal with a narrower dynamic range of amplitude signal than at the transmission operation time, an adaptive operation control sectionmeasures a spectrum in output of a power amplifierfor each predetermined output level, and a distortion compensation processing circuitfinds optimum coefficient information. On the other hand, at the transmission operation time, the optimum coefficient information found according to the above-mentioned procedure is referenced and the optimum coefficient information of a modulation signal with a wide dynamic range of amplitude signal is found.

Multimode-compatible polar modulation transmission device and multimode radio communication method

There are provided a sampling mixer, quadrature demodulator, and a wireless device capable of suppressing receiving sensitivity degradation caused by alias components or second-order distortion components. In the sampling mixer (), a sampling switch () and another sampling switch () sample a reception signal based on a local signal with a predetermined frequency. A control signal generator () generates a control signal for controlling a filter operation. An in-phase mixer () and a reverse-phase mixer () perform, based on the control signal, filter processing on the sample signal obtained by the sampling switch (). A delay controller () controls the phase difference between the local signal and the control signal according to a reception-desired frequency.

Sampling mixer, quadrature demodulator, and wireless device

A receiving apparatus includes an amplification section that amplifies a received signal and a frequency conversion section that converts a frequency of the received signal, from a radio frequency to a baseband, the baseband having a lower frequency than the radio frequency. A gain control section amplifies, by a predetermined gain, the signal that has been subjected to the frequency conversion to the baseband. A voltage calibration section performs calibration on an offset voltage generated in the signal subjected to frequency conversion to the baseband. A time constant control section sets a first time constant during a reception operation and sets a second time constant, which is reduced with respect to the first time constant, during the calibration. A filter section passes a received signal of a predetermined band, with the first time constant or the second time constant, an operation control section stops operation of the amplification section during the calibration, controls the amplification section to operate during the reception operation, and controls the operation of the amplification section so as to reduce a residual offset voltage caused by switching the operation of the amplification section.

Reception apparatus and reception method

An object of the invention is to provide a polar modulation transmitter that can perform adaptive distortion compensation processing without the need for a synchronization adjustment circuit for synchronizing an input baseband signal and an output signal of a power amplifier. An adaptive operation control sectionmeasures the unbalance amount of an output spectrum of a power amplifierand a coefficient adjustment determination section of the adaptive operation control sectionperforms iteration control so that if the unbalance amount is equal to or greater than a predetermined threshold value, coefficient information output to a distortion compensation processing circuitis adjusted and an adjustment is made to distortion compensation processing in the distortion compensation processing circuitand if the unbalance amount is less than the predetermined threshold value, the coefficient information is maintained, whereby the characteristic change of the power amplifierat the environmental temperature change time can be adaptively compensated for without using a synchronization adjustment circuit for synchronizing an input baseband signal and an output signal from the power amplifier

Polar modulation transmitter, adaptive distortion compensation processing system, polar modulation transmission method, and adaptive distortion compensation processing method

Provided is a discrete filter capable of increasing degree of freedom of design including a DC gain. A sampling mixer () includes: a control signal generation unit () which generates a control signal including an SO signal; a Ch () which successively integrates reception signals sampled by an LO signal frequency as discrete signals; a plurality of Cr () which successively integrate discrete signals at a timing based on the control signal; Cb () which alternately integrates the discrete signals successively integrated by the respective Cr (); and a gain control capacitance unit () which has gain control capacitors () connected in parallel to the respective Cr () and integrating the discrete signal and a reset switch () for resetting the discrete signal of the gain control capacitors () integrated in the past, upon connection between one end of Cr () and Cb ().

Discrete filter, sampling mixer, and radio device

A master stagecomprises a differential circuit composed of transistorsand, a differential circuit composed of transistorsand, a differential circuit composed of transistorsand, a load circuit(a first load circuit), a load circuit(a second load circuit), and a current source transistor. The load circuit(the first load circuit) is composed of an inductorA (a first inductor), an inductorB (a fifth inductor), and a capacityC (a first capacity). The inductorB and capacityC cooperates together in forming a parallel resonance circuit (a first LC parallel resonance circuit), while the parallel resonance circuit is connected in series to the inductorA.

Electronic circuit, frequency divider and radio set

A distortion compensating circuit is provided in which, in the polar modulation system, while suppressing increase of compensation data and increase of the circuit scale, a modulated signal can be correctly expressed, or low-distortion characteristics of a power amplifier can be realized. Based on a steady characteristic compensating circuitwhich stores an output signal amplitude and output phase characteristics with respect to a control voltage in a steady state, amplitude adjustment is executed on amplitude information r(t) on which amplitude correction is performed, by a first amplitude information adjusting portion, whereby the output-response characteristics of an output signal amplitude of an amplifier with respect to a change of the control voltage can be improved.

Distortion compensating circuit

A reception apparatus capable of preventing saturation and sensitivity degradation of a receiver when base transceiver station transmit power control is performed and calibrating offset voltage without increasing the amount of current consumption. In this apparatus, a gain setting section () estimates reception field intensity of each time slot in the next frame based on information of the reception field intensity and transmit power information which is information of the transmit power of the base transceiver station and calculates a gain set value according to the estimated reception field intensity. A gain control circuit () extracts a maximum gain out of the gains set by the gain setting section (), uses the maximum gain as a set gain for DC offset voltage calibration and performs gain control at the gain set value corresponding to each time slot. A voltage calibration circuit () performs the DC offset voltage calibration of the received signal.

A frequency dividing section is made up of a frequency divider for dividing output of a local oscillator, a frequency divider for dividing output of an in-phase local oscillation signal of the frequency divider, and a dummy circuit connected to the output terminal of a quadrature local oscillation signal of the frequency divider. At the first frequency band operation time, output of the frequency divider is used for modulation and demodulation and at the second frequency band operation time, output of the frequency divider is used for modulation and demodulation. Although the frequency divider is shared between the first and second frequency bands, the dummy circuit is made the same circuit as an input amplifier of the frequency divider at the first frequency band operation time, so that the phase difference between the in-phase local oscillation signal and the quadrature local oscillation signal output by the frequency divider can be kept. Accordingly, the frequency dividers are shared and combined for lessening the circuit scale.

Frequency dividing circuit and multimode radio device using the same

An object of the invention is to provide a polar modulation circuit capable of reducing the capacity of data stored in memory and suppressing an increase in the circuit scale related to distortion compensation while assuring the compensation accuracy. The polar modulation circuit according to the invention stores output signal characteristic relative to the control voltage at the steady state after input of the control voltage for a predetermined input amplitude of an input high frequency signal as the basis of distortion compensation of an amplifier separately into an offset storage sectionwhich stores data used to add a predetermined DC offset voltage and a coefficient storage sectionwhich stores data used for multiplication by a predetermined constant, thus reducing the circuit scale related to distortion compensation while assuring the compensation accuracy.

Growing community of inventors

Kanagawa, Japan

Yoshito Shimizu