Kabushiki Kaisha Toshiba

Tokyo Shibaura Denki Kabushiki Kaisha

Yoshito Kawakyu

Mitsuo Nakajima

Masao Mashita

Hiroshi Mitsuhashi

Masahiro Sasaki

Hiroshi Ito

Isao Suzuki

Tsutomu Tezuka

Mitsuhiro Kushibe

Atsushi Kurobe

Mitsuhiro Tomita

Tetsuo Sadamasa

Takaaki Kamimura

Shiro Takeno

Mitsuaki Suzuki

Yuki Matsuura

Hideyuki Sasaki

Hisao Hori

Michihiro Oose

Yasumasa Gotou

Toyoki Higuchi

A thin film transistor to be adapted to each pixel switch in a liquid crystal display has a polycrystalline silicon layer which is acquired by crystallizing amorphous silicon deposited on a glass substrate by laser annealing. A characteristic curve indicating the intensity distribution of a laser beam in this laser annealing has a peak shifted on the upstream side in the direction the glass substrate is moved. In the laser annealing of amorphous silicon, the laser beam is irradiated on the amorphous silicon in such a way that a higher-intensity portion of the laser beam hits the amorphous silicon first. This can make the fluence margin of a laser beam in laser annealing wide enough to achieve a high field-effect mobility and a high yield.

Method of producing polycrystalline silicon

There is disclosed a method for manufacturing a polycrystal semiconductor film comprising the steps of applying a high energy beam to a surface of a semiconductor film comprising an amorphous or a polycrystal semiconductor provided on a surface of a substrate to melt only the semiconductor film, and solidifying the film via a solid and liquid coexisting state to form a semiconductor film comprising a polycrystal semiconductor having a large grain diameter, by heating a liquid part using a difference in an electric resistance in the liquid and solid coexisting state to heat only the liquid part, and by extending the solidification time until the completion of solidifying of the molten liquid crystal film. Furthermore, as the base film of the semiconductor film, a material having a melting point of 1600.degree. C. and a thermal conductivity of 0.01 cal/cm.s..degree. C. is used to suppress heat dissipation from the molten liquid of the semiconductor to the substrate so that time until the complete solidification can be prolonged. Furthermore, the beam is irradiated so as to form a standing wave at a predetermined position of the surface of the semiconductor film to generate the heat density distribution having the same cycle with the standing wave and to melt the semiconductor film with the result that a polycrystal semiconductor film comprising a uniform and a large crystal grains by controlling the distribution of the crystal nuclei at the interface between the base film and the substrate.

Method for manufacturing polycrystal semiconductor film

A thin film transistor is disclosed, that comprises a first substrate protection film formed on a transparent insulation substrate, a second substrate protection film formed in a predetermined shape on the first substrate protection film, a semiconductor film having a channel region and a contact region formed on the second substrate protection film, the channel region being surrounded by the contact region, a gate insulation film formed above the semiconductor film, the gate insulation film having an opening portion for the contact region of the semiconductor film, a gate electrode formed in a region corresponding to the channel region of the semiconductor film on the gate insulation film, an inter-layer insulation film formed above the gate electrode, the inter-layer insulation film having an opening portion for the contact region of the semiconductor film, and a plurality of electrodes formed on the inter-layer insulation film, the plurality of electrodes being connected to the contact region of the semiconductor film through the opening portion. The edge surfaces of the second substrate protection film may be tapered. A contact state between the gate electrode and the inter-layer insulation film is controlled corresponding to the concentration of hydrogen of the inter-layer insulation film.

Non-single crystal semiconductor apparatus thin film transistor and

A polycrystalline silicon active layer is provided on a transparent insulating substrate. Phosphorus is ion-implanted into the active layer, to form a pair of n-type source/drain regions with a base region interposed therebetween. In this ion-implantation, a density gradient of phosphorus is formed in the thicknesses direction of the active layer. Boron is ion-implanted into each of the source/drain regions, to be adjacent to the base region. In this ion-implantation, a density gradient of boron is formed, and the position providing a maximum density of boron is set to be deeper than the position which provides a maximum density of phosphorus. By the ion-implantation of boron, an n-type LDD portion having a high resistance and a p-type portion are formed on the upper and lower sides, respectively, adjacent to the base region within each of the source/drain regions.

LCD TFT having two layer region adjacent base region in which the layers

A thin-film transistor device comprising a pixel section including a plurality of pixel electrodes arranged in rows and columns on a substrate and a plurality of thin-film transistors of reverse stagger type, connected as switching elements to the pixel electrodes, respectively, and a drive section including a plurality of thin-film transistors of coplanar type, each having a gate insulating film, for driving the thin-film transistors of the reverse stagger type. A lower insulating film is located beneath the thin-film transistors of the reverse stagger type. The lower insulating film and the gate insulating films of the thin-film transistors of the coplanar type are formed of a first insulating film provided on the substrate.

Integrated circuit device having an insulating substrate, and a liquid

Disclosed is a method of efficiently manufacturing a III-V group compound semiconductor that carbon mixing is reduced, wherein a compound represented by the formula (1) or (2) is used as a V group source: ##STR1## wherein X represents a V group element, n represents integer of 1 to 3, and Y represents electron-releasing group bonded to a position selected from 2-, 4-, and 6-positions, ##STR2## wherein X represents a V group element, m represents an integer of 1 or 2, and Y represents electron-releasing group bonded to a position selected from 2- and 4-positions.

Method of manufacturing III-V group compound semiconductor

A microcavity semiconductor laser disclosed therein includes a double-heterostructure section including an intermediate active layer sandwiched between a first or lower cladding layer and a second or upper cladding layer above a semiconductive substrate. A first multi-layered reflector section is arranged between the substrate and the double-heterostructure section to have its reflectance which becomes maximum near the oscillation wavelength of the laser. The upper cladding layer is semi-spherically formed. A three-dimensional optical reflector covers the double-heterostructure section, for controlling spontaneous emission obtained in the double-heterostructure section along various directions, and for increasing the coupling ratio of spontaneous emission with a specific laser mode, thereby to decrease the threshold current.

Semiconductor laser device with multi-directional reflector arranged

Disclosed is a method of selective chemical vapor deposition for selectively forming thin films of a semiconductor, dielectric or metal on a semiconductor by providing a mask of SiO.sub.2 having a plurality of openings in various forms on the substrate, wherein a trimethyl gallium (TMG) gas as a Group III material, 10% hydrogen-based arsine (AsH.sub.3) gas as a Group V material, and 500 ppm hydrogen-based disilane (Si.sub.2 H.sub.6) gas as an n-type impurity material are alternately supplied onto the substrate, and each supply amount of the material gases is controlled at a value to obtain a film growth rate for forming the corresponding monoatomic layer or monomolecular layer to each material at each opening. Also disclosed is an apparatus for performing the above-disclosed method of chemical vapor deposition, wherein four reaction chambers are included, and the material gases are supplied to the respective reaction chambers in accordance with the following gas supply sequences: Chamber 1: TMG+H.sub.2 /H.sub.2 (for gas replacement)/AsH.sub.3 +H.sub.2 /H.sub.2 (for gas replacement); Chamber 2: H.sub.2 (for gas replacement)/AsH.sub.3 +H.sub.2 /H.sub.2 (for gas replacement)/TMG+H.sub.2 ; Chamber 3: AsH.sub.3 +H.sub.2 /H.sub.2 (for gas replacement)/TMG+H.sub.2 /H.sub.2 (for gas replacement); Chamber 4: H.sub.2 (for gas replacement)/TMG+H.sub.2 /H.sub.2 (for gas replacement)/AsH.sub.3 +H.sub.2.

Method for producing compound semiconductors and apparatus therefor

A vapor-phase epitaxial growth method for group III-V compound semiconductor crystal layers by which alternating layers of (InAs)1 and (GaAs)1 are grown on an InP substrate by means of vapor-phase epitaxy while different material gases are supplied alternately. The substrate is irradiated with excimer laser light when a specific layer of the crystal layers is grown, thereby controlling the thickness of the specific crystal layer on a monoatomic scale.

Vapor-phase epitaxial growth method for semiconductor crystal layers

A thin film electroluminescence device which comprises a pair of electrodes, at least one of which is transparent, and a light-emitting layer consisting essentially of oxygen-containing amorphous hydrogenated silicon carbide and being interposed between said paired electrodes.

Growing community of inventors

Kawasaki, Japan

Yoshito Kawakyu