Fujitsu Corporation

Yoshitaka Taki

Kazuhiko Hata

Junji Yamamoto

Toru Kosugi

Toru Katagiri

Osamu Takeuchi

Satoru Saitoh

Taku Saito

Hiroyuki Honma

Hirofumi Araki

Keiichiro Tsukamoto

Tomoyoshi Fujimori

Satoru Miyazaki

Isao Chiku

Yoshihiro Yatagai

An optical transmission system includes: a transmission node to transmit wavelength-multiplexed light of a plural wavelengths arranged in a predetermined transmission band; and a reception node to receive the wavelength-multiplexed light, and to include a monitor to monitor a detection sensitivity indicating a sampling phase shift with respect to a phase of light corresponding to one among the received plural wavelengths, and a transmitter to transmit information indicating that the monitored detection sensitivity for light corresponding to a wavelength adjacent to an outer edge of the transmission band, among the plural wavelengths, has been reduced below a threshold value, to the transmission node, wherein the transmission node includes a receiver to receive information indicating a reduction in the detection sensitivity, and a controller to stop wavelength control of shifting the wavelength adjacent to the outer edge in a direction approaching the outer edge in response to reception of the information.

Optical transmission system, wavelength control method and node

A transmission apparatus includes a generation unit configured to generate a first data unit including a second data unit, and an addition unit configured to add fault data indicating a fault state of the second data unit to a data portion different from a data portion in which the second data unit is positioned within the first data unit.

Transmission apparatus, reception apparatus, transmission method, and reception method

In a path status monitoring method and device which can enhance or reduce a band more rapidly, for example, SONET frames FR serially connected over 32 frames to which frame Nos. FN ('0'-'31')) are assigned are cyclically generated respectively for paths P-Pin a cycle T(=64 ms). After output timing delays T-Tof the frames FR are shifted by an optimal delay interval D (=21 ms) between the paths P-Pbased on the number of the paths &#x201c;3&#x201d;, the output timing delays Tand Tare restored by preliminarily obtained transmission delays for the paths Pand Pto the path P. When the frames FR are transmitted through each of the paths P-P, statuses (path statuses MST) where a reception fault has occurred in each of the paths P-Pare collected to be stored in the frame whose frame No. FN=&#x201c;0&#x201d;.

Path status monitoring method and device

A transmitter having an interface module to serve as an interface between ATM cells and synchronous frames. The interface module comprises a plurality of first physical paths for inputting ATM cells with channel identifiers given thereto to identify channels respectively; a second physical path for outputting a synchronous frame signal; a channel identifier inserter for inserting the channel identifiers, which are given to the first physical paths where the ATM cells are inputted, into predetermined areas of the ATM cells; and a mapper for mapping the multi-channel ATM cells with the channel identifiers inserted therein to one synchronous frame signal and outputting the same to the second physical path.

Transmitter with cell switching function

A method for a path trace check reducing a load on a computer, raising the speed of the check, and easily enabling an increase of nodes to be added. On a sender side, a first computer simply generates path trace data, adds a specific code CR to this, multiplexes this to the transmission data, then transmits the same to a transmission line. On a receiver side, a second computer simply generates an expected value of the path trace data, autonomously compares this expected value and the actual path trace data extracted from the received transmission data by using the specific code, and determines coincidence of the two.

Method and apparatus for path trace check

A synchronization message detecting unit detects a synchronization message from a line signal received from a line terminating unit. A synchronization message processing unit controls whether or not to select a clock reference received from the line as an active reference according to a quality level represented by the synchronization message. In this case, when an installed state detecting unit has determined that the synchronization message detecting unit has not been installed, the synchronization message processing unit does not select a clock reference corresponding to the synchronization message detected by the synchronization message detecting unit determined as a non-installed unit as the active reference.

Synchronization message reception processing apparatus

A unit of the invention is installed in each of transmission units that make up a synchronous network. The unit selects from the clock references received an active reference that controls the operation of the corresponding transmission unit, based on the quality levels of clock references presented by synchronization messages received with the clock references. The clock references, each of which is selectable as the active reference, and their selection priorities are entered into a source priority list. By referencing the source priority list, the active reference is selected.

Synchronization-message-based active reference switching unit

A synchronization message transmitting apparatus employs a synchronization message to synchronize a communication network. If an abnormality occurs in any part of the apparatus or on a clock in the apparatus, the apparatus detects the abnormality and prepares a synchronization message indicating that a frame to be transmitted must not be used for preparing a master clock. An opposite party that receives the frame with the synchronization message will not use the received frame for preparing a master clock.

Synchronization message transmitting apparatus

A digital communication network has a first end office which includes a first multiplexer unit and a second end office which includes a second multiplexer unit. The network performs transmission and reception of multiplexed signals between the first end office and the second end office. A monitor unit is provided within the first end office. Monitoring is performed of the accuracy of the signal received by the second end office from the first end office, signal accuracy information with regard to the received signal being included as subsignalling information in the input signal Sin which is input to the first end office from the second end office. The subsignalling information is extracted by the monitor unit from the input signal, so as to enable monitoring of the signal accuracy of the input signal. The result is a significant improvement in the improvement of transmission quality monitoring service provided in the digital communication network.

Transmission quality monitoring system for a digital communication

A frequency synchronous circuit has a first selection unit, a first counter unit, a second counter unit, a storage/average unit, and a comparison unit. The first selection unit is used to select one sampling signal from a first sampling signal having a first sampling time and a second sampling signal having a second sampling time shorter than the first sampling time. The first counter unit is used to count a reference signal supplied from outside the frequency synchronous circuit during the sampling time of the selected one sampling signal, and the second counter unit is used to count a synchronous clock signal to be output from the frequency synchronous circuit during the sampling time of the selected one sampling signal. The storage/average unit, which is operatively connected to the first counter unit, is used to store and average an output signal of the first counter unit. The comparison unit, which is connected to the storage/average unit and the second counter unit, is used to compare an output signal from the storage/average unit with an output signal from the second counter unit, and the frequency synchronous circuit outputs the synchronous clock signal whose frequency is synchronized in accordance with an output signal of the comparison unit. Therefore, a transition period determined from a power ON state to a stable state can be reduced, and further, an original clock signal can be obtained and output by removing any noise components from a clock signal.

Frequency synchronous circuit for reducing transition period from power

A frequency synchronous circuit has a first counter unit, a second counter unit, a storage/average unit, and a comparison unit. The first counter unit is used to count a reference signal supplied from outside the frequency synchronous circuit during a sampling time which is defined by a sampling signal, and the second counter unit is used to count a synchronous clock signal to be output from the frequency synchronous circuit during the sampling time of the sampling signal. The storage/average unit, which is operatively connected to the first counter unit, is used to store and average an output signal of the first counter unit. The comparison unit, which is connected to the storage/average unit and the second counter unit, is used to compare an output signal of the storage/average unit with an output signal of the second counter unit, and the frequency synchronous circuit outputs the synchronous clock signal whose frequency is synchronized in accordance with an output signal of the comparison unit. Therefore, an original clock signal can be obtained and output by removing noise components from a clock signal which may include the noise components.

Growing community of inventors

Kawasaki, Japan

Yoshitaka Taki