Hitachi, Ltd.

Renesas Technology Corp.

Hitachi Metals, Ltd.

Hitachi High-tech Corporation

Renesas Electronics Corporation

Yoshitaka Sasago

Takashi Kobayashi

Masaharu Kinoshita

Satoru Hanzawa

Norikatsu Takaura

Akio Shima

Kenzo Kurotsuchi

Motoyasu Terao

Mitsuharu Tai

Takahiro Morikawa

Hiroyuki Minemura

Hideaki Kurata

Tsuyoshi Arigane

Toshiyuki Mine

Kazuo Otsuga

Hitoshi Kume

Hideyuki Matsuoka

Noriyuki Sakuma

Toshimichi Shintani

Aritoshi Sugimoto

Akira Kotabe

Yoshihisa Fujisaki

Hitoshi Nakamura

Nobuyuki Mise

Minoru Ogushi

Riichiro Takemura

Takao Watanabe

Seiji Miura

Yoshinobu Kimura

Seiichi Watanabe

Yumiko Anzai

Tomoyuki Ishii

Shuntaro Machida

Naohiko Irie

Daisuke Ryuzaki

Takashi Tsutsumi

Kazuo Ono

Tetsufumi Kawamura

Toshiyuki Usagawa

Hideo Arimoto

Yoshihiro Ikeda

Kenji Kanamitsu

Kazuki Tani

Takashi Takahama

Takahiro Odaka

Tomoyuki Kodama

Norikastsu Takaura

Nobuyuki Arasawa

Munenori Degawa

The present invention aims to provide a fuel battery system improved in reliability by accurately detecting when a fuel electrode gas or an air electrode gas has leaked. A fuel battery cell according to the present invention includes a first electrode, an electrolyte membrane, and a second electrode which are layered on a support substrate. Further, at least any one of the first electrode, the electrolyte membrane, and the second electrode is electrically isolated by an insulating member to form a first region and a second region. The insulating member is disposed at a position where the insulating member does not overlap with an opening portion of the support substrate (refer to FIG.).

Fuel battery cell, fuel battery system, leak detection method

Provided is a highly reliable fuel cell that improves power generation efficiency of the fuel cell and that is less likely to cause damage to an electrode and an electrolyte film. The fuel cell includes a support substrate () having a region in which a support portion having a mesh-like shape in a plan view is provided, a first electrode 4 on the support substrate, an electrolyte filmon the first electrode, and a second electrodeon the electrolyte film. The first electrode includes a first thin film electrodeA formed in a manner of covering at least the region, and a first mesh-like electrodeB connected to the first thin film electrode and provided corresponding to the support portion. The first mesh-like electrodeB has a film thickness larger than that of the first thin film electrode and has a mesh-like shape in a plan view.

Fuel cell

A gas sensor capable of stably detecting a gas concentration with a high reliability even under a high temperature environment is provided. The gas sensor includes an element unit having a capacitance value changing in accordance with a gas concentration, an inductor forming a resonant circuit in cooperation with the element unit, a phase detection circuit detecting a phase difference between a standard frequency and a resonant frequency of the resonant circuit, and a feedback unit supplying, to the element unit, a voltage changing in accordance with the phase difference detected by the phase detection circuit. The capacitance value of the element unit is controlled by the voltage from the feedback unit so as to reduce the phase difference between the resonant frequency and the standard frequency, and a gas concentration detection output is output based on the phase difference.

Gas sensor

In a gas sensor using a first FET-type sensor for a sensor unit, a gas density measurement unit measures a gas density of gas to be detected at a predetermined time on the basis of a first threshold change as a difference between a first threshold voltage applied to a first gate layer when a first source-drain current is a first threshold current while the gas to be detected is not present in the atmosphere and a second threshold voltage applied to the first gate layer when the first source-drain current is the first threshold current at the predetermined time while the gas to be detected is present in the atmosphere, and a temporal differentiation of the first threshold change.

A sensor element includes a sensor FET provided in a main surface of a semiconductor substrate, a cavity provided in the sensor FET and into which a detection target gas is introduced, and an ion pump provided over the cavity. By laminating the ion pump over the sensor FET via the cavity, a part of a front surface of a gate layer is exposed to the cavity, and a part of a lower surface of an ion pump electrode is exposed to the cavity. When the gate layer comes into contact with the detection target gas, a work function changes, so that gas concentration can be detected.

In order to form a phase change thin film being flat in a nanometer level and having a good coverage, which is essential for realizing a three-dimensional ultra-high integrated phase change memory, an equipment for vapor phase growth of a phase change thin film is provided which form a phase change thin film at low temperature while the film is being kept in a completely amorphous state. A structure is provided in which an ammonia cracker is connected to a reactor of the equipment for vapor phase growth for a nitrogen radical obtained by decomposing ammonia gas. Consequently, low temperature decomposition of metal organic precursor and film formation on a substrate surface are realized. With the use of this equipment, it is possible to realize a completely amorphous film which has a flat surface at a low temperature of 135&#xb0; C. using an amine complex as a Ge precursor.

Method for vapor-phase growth of phase-change thin film, and device for vapor-phase growth of phase-change thin film

In a semiconductor storage device that is formed on a semiconductor substrate, flows a current to a recording material formed between electrodes to change a resistance value of the recording material and store information, and flows currents of different magnitudes in a high resistance change operation and a low resistance change operation, electrodes of a plurality of memory cells are electrically connected directly or via transistors to form large electrodes, the large electrodes are connected to a feeding terminal from a power source circuit, and the large electrodes are connected to large electrodes connected to a feeding terminal from a power source connected between a plurality of memory cells different from the plurality of memory cells via inter-large electrode connection transistors. By using the semiconductor storage device, a connection pattern of a feeding electrode for the memory cells can be configured according to the magnitude of a consumption current, power consumption by a voltage drop by a parasitic resistance of the feeding electrode and power consumption by charge/discharge of a parasitic capacitance around the feeding electrode can be suppressed, and performance per consumption power in read/set/reset operations can be improved.

Semiconductor storage device

In an optical modulatorof an embodiment, an optical waveguide coreis configured from an ntype semiconductor region, a gate insulating filmon the ntype semiconductor region, and a ptype semiconductor regionon the gate insulating film. Further, a width Wof the ntype semiconductor regionand a width Wof the ptype semiconductor regionare equally formed and are layered without being shifted. Therefore, an optical modulator having stable optical characteristics can be provided.

Optical modulator and method for manufacturing same

When a thin channel semiconductor layer formed on a side wall of a stacked film in which insulating films and gate electrodes are alternately stacked together is removed on the stacked film, a contact resistance between a vertical transistor including the channel semiconductor layer and the gate electrode, and a bit line formed on the stacked film is prevented from rising. As its means, a conductive layer electrically connected to the channel semiconductor layer is disposed immediately above the stacked film.

Nonvolatile memory device and method for manufacturing same

An object of this invention is to provide a semiconductor memory device capable of increasing the read transfer rate by performing the read operation in parallel while suppressing the voltage drop when a large current is passed to a memory chain and reducing a chip area by reducing the number of peripheral circuits to feed power. A semiconductor memory device according to this invention includes upper and lower electrodes in a flat plate shape, first and second select transistors extending in first and second directions respectively, and a wire arranged between the first select transistor and the second select transistor and the wire and the lower electrode are configured to be electrically insulated from each other by turning off the first select transistor (see FIG.).

The purpose of the present invention is to provide a semiconductor storage device, which has small resistance in the ON state, and a small leak current in the OFF state, and which has a small-sized select transistor used therein. In this semiconductor storage device, a channel of a first select transistor that selects a memory cell array is electrically connected to each of the adjacent memory cell arrays (see FIG.).

Disclosed are a semiconductor storage device and a method for manufacturing the semiconductor storage device, whereby the bit cost of memory using a variable resistance material is reduced. The semiconductor storage device has: a substrate; a first word line () which is provided above the substrate; a first laminated body, which is disposed above the first word line (), and which has the N+1 (N&#x2267;1) number of first inter-gate insulating layers (-) and the N number of first semiconductor layers (-) alternately laminated in the height direction of the substrate; a first bit line (), which extends in the direction that intersects the first word line (), and which is disposed above the laminated body; a first gate insulating layer () which is provided on the side surface of the N+1 number of the first inter-gate insulating layers (-) and those of the N number of the first semiconductor layers (-); a first channel layer () which is provided on the side surface of the first gate insulating layer (); and a first variable resistance material layer () which is provided on the side surface of the first channel layer. The first variable material layer () is in a region where the first word line () and the first bit line () intersect each other. Furthermore, a polysilicon diode (PD) is used as a selection element.

Semiconductor storage device and method for manufacturing same

A memory cell array having such a structure that can be realized with a simpler process and ideal for realizing a higher density is provided. Memory cells have a structure in which channel layers (and) are formed on the side surfaces of each of a plurality of stacked structures which extends in the Y direction and is periodically formed in the X direction with a gate insulator film layer () interposed, and a resistance-change material layer () is formed so as to be electrically connected to two adjacent channel layers of the channel layers. Due to such a structure, it is not necessary to perform such a very difficult step that processes the resistance-change material and the silicons collectively and it is possible to provide the memory cell array with a simpler process.

Semiconductor storage device and method of fabricating same

A vertical chain memory includes two-layer select transistors having first select transistors which are vertical transistors arranged in a matrix, and second select transistors which are vertical transistors formed on the respective first select transistors, and a plurality of memory cells connected in series on the two-layer select transistors. With this configuration, the adjacent select transistors are prevented from being selected by respective shared gates, the plurality of two-layer select transistors can be selected, independently, and a storage capacity of a non-volatile storage device is prevented from being reduced.

Non-volatile memory device and production method thereof

Growing community of inventors

Tachikawa, Japan

Yoshitaka Sasago