Canon Kabushiki Kaisha

Nec Compound Semiconductor Devices, Ltd.

Yoshitaka Murata

Nobuaki Date

Kan Takaiwa

Hideaki Kawamura

Hiroyuki Horii

Toshihiko Mimura

Akihiko Tojo

Seiichi Ozaki

Takashi Suzuki

Kenichi Nagasawa

Junzo Taira

Nobuo Tezuka

Yukio Ogawa

Syuichiro Saito

Akio Sunouchi

Akira Kuwano

Yoko Kawasumi

In a phase locked loop type frequency synthesizer including a phase/frequency comparator for receiving an input signal, a charge pump circuit, a loop filter for generating a control voltage, a voltage control oscillator block including a plurality of voltage controlled oscillators controlled by the control voltage, and a frequency divider formed by a fixed frequency divider and a programmable frequency divider, a selecting circuit selects and activates only one of the voltage controlled oscillators, and counts a number of output pulses of the first frequency divider within a predetermined number of output pulses of the input signal while applying a bias voltage to the loop filter. Thus, the one of the voltage controlled oscillators being selected so that the number of the output pulses of the first frequency divider is brought close to an optimum value.

Wide lock range phase locked loop and method of operation

A digital image recording and/or reproducing apparatus using a plurality of compression methods may include, in a recording section, (a) data compression circuitry, including a plurality of compression circuits which have different compression methods, for changing a compression rate for input digital image data by changing a combination of the plurality of compression circuits compressing the digital input image data and (b) circuitry for recording (1) the digital image data compressed by the data compressing circuit and (2) data representing the compression rate of the digital image data compressed by the data compressing circuit. The apparatus may include a reproducing section having (a) a reproducing circuit for reproducing from the recording medium the digital image data compressed with the compression rate provided by the combination of different compression methods, (b) detecting circuitry for detecting the data representing the predetermined compression rate stored on the recording medium, and (c) reconstruction circuitry for reconstructing the digital image data reproduced by the reproducing circuitry according to the representing data detected by the detecting circuitry.

Digital image recording and/or reproducing apparatus using a plurality of compression methods

A solid-state camera includes a loading detecting unit for detecting loading of a detachable solid-state memory apparatus, a checking unit for checking the loaded solid-state memory apparatus, and a control unit for performing control of each section which includes predetermined display control in accordance with a check result of the checking unit.

Solid-state camera and solid-state memory apparatus

A solid-state memory apparatus including a characteristic code holding device for holding a characteristic code representing characteristics of an internal circuit, a readout device for reading out the characteristic code held in the characteristic code holding device, and an output device for outputting the characteristic code read out by the readout device to an external device.

Solid-sate camera with solid-state memory for holding characteristic

A solid-state camera of the type which uses a solid-state memory as an image recording device. The solid-state camera includes an examining circuit for examining whether image recording is possible in response to a first stage of a release operation, and a control circuit for executing a predetermined warning operation in response to the output of the examining circuit. The solid-state camera is arranged to effect recording on the solid-state memory in a second stage of the aforesaid release operation.

Solid-state camera in which a removable solid state memory having a

There is disclosed a memory apparatus equipped with a memory capable of random data storage and readout, plural address generators storing start address of each of blocks defined in the memory, a detector for detecting the image processing method used in the input into or output from the memory, and a switching unit for switching the start address of each block according to the output of the detector.

Detachable memory with starting block address selected in accordance

A method and system for providing a display on a device to which a detachable solid state memory devices, which includes a plurality of memory blocks, is attached. The method includes the steps of determining to which of a plurality of broadcasting system standards a detected size of each of the memory blocks in the solid state memory device corresponds, and providing a display on an apparatus to which the solid state memory device is attached, such as an electronic still camera, based on the detected size. In a preferred embodiment, the broadcasting standards are NTSC (National Television Systems Committee) and (Phase Alternation Line). A user is warned when a detected size of each of the memory blocks is not a predetermined size, thus, not the correct broadcasting system standard for the apparatus. Each of the memory blocks stores data corresponding to one picture image.

System and method for indicating whether a block size in a detachable

A solid-state camera employing as a recording medium a solid-state memory cartridge capable of being loaded into and unloaded from the camera body. First signal-transmission sections are provided on the camera body and a solid-state memory cartridge for permitting the transmission of a signal between the camera body and a solid-state memory cartridge loaded therein while assuming a first loading state. At least one second signal-transmission section is provided on the camera body for permitting signal transmission between the camera body and a solid-state memory cartridge loaded therein while assuming a second loading state different from the first loading state.

Solid state camera having a camera body for supporting a recording medium

Camera apparatus including a loading detection sensor for detecting the completion of the loading of a solid-state memory cartridge, a contact member for contacting electric contacts on the cartridge for communicating data between the camera and the cartridge, and a communication control circuit for starting data communication between the memory cartridge and the camera when the loading detection sensor detects that the cartridge has been installed. The contact member moves from a first position at a distance from the memory cartridge contacts to a second position contacting the memory cartridge contacts.

Camera sensing when a memory cartridge is installed

A camera comprising a semi-open type shutter which also serves as a diaphragm, a flash device, a setting circuit for setting an aperture value for flash photography, and a control circuit for varying the opening speed of the shutter in accordance with the aperture value set by the setting circuit, whereby the previously set aperture value is established with high accuracy and reliability during the flash emission.

Camera

A camera having an automatic focusing device is arranged to inhibit the diaphragm aperture thereof from being controlled and set during the process of automatic focusing at any aperture value near to a full aperture value at which the focusing accuracy of the automatic focusing device is hardly warrantable, so that photographing can be carried out always in an in-focus condition.

Camera with automatic focusing device

A shutter device for a still video camera comprises first and second shutter blades, a latch member and an unlatch member. The latch member latches the first blade at its moved position where an image pickup element is exposed to an image light. The first blade is kept latched for a preparatory exposure to correct a set exposure value on the basis of the output of the pickup element or for picking up a motion picture. The unlatch member releases the latching of the first blade. In one embodiment, the unlatch member is provided on the second blade to unlatch the first blade when the second blade is moved to terminate the exposure. In other embodiments, the unlatch member includes an electromagnet to unlatch the first blade. A still video camera comprises a view finder mirror and a mirror operating mechanism. The mechanism includes a motor and is arranged to retract and return the mirror relative to an optical path by utilizing a normal and a reverse rotation of the motor, respectively. In the disclosed embodiments, the camera further comprises a mechanism to maintain the mirror in the retracted condition and a shutter in the opened condition to operate in a motion video mode where an image pickup element is continuously exposed to an image light. The mechanism for setting in the motion video mode may be operable manually from the exterior of the camera or by connecting an external device to the camera.

Camera shutter and viewfinder control apparatus

A flash photography system of the kind performing a flash adjusting action in a mode of adjusting an aperture value, a guide number, etc. according to a distance to an object to be photographed is arranged to allow the flash adjusting action to be performed in the above-stated mode only when a combination of the object distance detected by an automatic focusing device and the focal length currently set shows a given value. If the combination fails to show the given value, the system either has the flash adjusting action performed in a manner which differs from the above-stated mode or allows the flash adjusting action to be performed in the above-stated mode by changing the focal length of a photo-taking lens.

Growing community of inventors

Yokohama, Japan

Yoshitaka Murata