Mitsubishi Electric Corporation

Mitsubishi Denki Kabushiki Kaisha

Yoshitaka Kamo

Hidetoshi Koyama

Hiroyuki Okazaki

Eigo Kuwata

Kenichiro Kurahashi

Hiroaki Tosa

Tatsushi Higashi

Makoto Kimura

Koji Yamanaka

Yoshitsugu Yamamoto

Hiroshi Otsuka

Kazuhiko Nakahara

Tetsuo Kunii

Toshihiko Shiga

Shinichi Miyakuni

Yoichi Nogami

Toshiaki Kitano

Akihiro Kuroda

Dai Ninomiya

Tasuku Kirikoshi

Examples of an electronic component device includes a housing formed of a member that causes radiation to lose its energy by generating an electric charge when the housing is subjected to the radiation and an electronic component housed in the housing. The member is a semiconductor device member having a PN junction.

Electronic component device

A MIM capacitor is included in any one or more of a first matching circuit and a second matching circuit. The mat capacitor performs impedance matching of a fundamental wave included in a high-frequency signal with a transmission line, and forms a short-circuit point for a harmonic included in the high-frequency signal at a connection point with the transmission line.

High-frequency amplifier

Parallel capacitors (and) of impedance matching circuits () which are connected to two transistors (), respectively, have their first ends connected to a ground through via holes (and) that are used in common, respectively. Although a conventional circuit necessitates via holes by the number equal to the number of stages multiplied by the number of cells of the transistors () for an LPF type impedance matching circuit (), the present circuit can halve the number of via holes of the LPF type impedance matching circuit (), thereby being able to downsize the circuit.

Broadband amplifier

A semiconductor device includes: a substrate; a nitride semiconductor film on the substrate; a schottky electrode on the nitride semiconductor film; a first insulating film on the nitride semiconductor film, contacting at least part of a side surface of the schottky electrode, forming an interface with the nitride semiconductor film and formed of SiN; and a second insulating film covering the schottky electrode and the first insulating film and formed of AlO whose atomic layers are alternately disposed.

Semiconductor device and method for manufacturing the same

A semiconductor device includes: a Si substrate having first and second major surfaces facing in opposite directions; a buffer layer of AlGaN (0&#x2266;x&#x2266;1) on the first major surface of the Si substrate; an epitaxially grown crystalline layer of AlGaN (0&#x2266;y&#x2266;1, x&#x2260;y) on the buffer layer; a transistor on the epitaxially grown crystalline layer; and a filler of AlGaN and having the same x as the buffer layer. A through hole in the Si substrate extends from the second major surface to the buffer layer, and the through hole is filled with the filler.

Semiconductor device with improved conductivity

A method of manufacturing a semiconductor device includes forming a first layer on a semiconductor layer, forming a second layer on the first layer, forming a patterned mask on the second layer, etching and removing a portion of the second layer that is not covered by the patterned mask, wet etching the first layer to a width which is less than the width of the patterned mask, after the wet etching, forming an insulating layer on the semiconductor layer, removing the first layer and the second layer to form an opening in the insulating layer, and forming a gate electrode on a surface of the semiconductor layer exposed through the opening.

Method of manufacturing semiconductor device

A semiconductor device includes: a semiconductor substrate having a hexagonal crystalline structure with a c-axis and c-planes; and transistors on a c plane of the semiconductor substrate. Source electrodes of the transistors are connected to each other. Drain electrodes of the transistors are connected to each other. Gate electrodes of the transistors are connected to each other. The gate electrodes of the transistors extend along directions that form angles with each other that are 60 degrees or 120 degrees, in a plan view seen from a direction perpendicular to the c plane of the semiconductor substrate.

Semiconductor device

A method for manufacturing a semiconductor device includes forming a source electrode and a drain electrode on a front face of a semiconductor substrate which is transparent to visible light, forming a front-side gate electrode between the source electrode and the drain electrode on the front face of the semiconductor substrate; forming an aligning mark on a region of the front face of the semiconductor substrate other than a region between the source electrode and the drain electrode, aligning the semiconductor substrate based on the aligning mark that is seen through the semiconductor substrate, and forming a back-side gate electrode on a back face of the semiconductor substrate in a location opposite the front-side gate electrode.

Method for manufacturing semiconductor device

A semiconductor device includes a first semiconductor layer and a first semiconductor element located in the first semiconductor layer. The semiconductor device also includes a second semiconductor layer of a transparent semiconductor material. The second semiconductor layer is disposed on the first semiconductor layer covering the first semiconductor element. The semiconductor device also includes a second semiconductor element located in the second semiconductor layer. The semiconductor device also includes a wire extending within the second semiconductor layer and electrically connecting the first and second semiconductor elements.

Semiconductor device including a transparent semiconductor layer for viewing an underlying transistor in a semiconductor substrate

A transistor includes a nitride semiconductor layer and a gate electrode layer. The gate electrode layer includes a tantalum nitride layer on the nitride semiconductor layer. The tantalum nitride layer forms a Schottky junction with the nitride semiconductor layer. The transistor also includes an insulating film on the nitride semiconductor layer. The insulating film surrounds the gate electrode layer. A first portion of the gate electrode layer, in contact with the nitride semiconductor layer, has a higher nitrogen mole fraction than a second portion of the gate electrode layer.

Transistor

A field effect transistor includes a semiconductor substrate having an active region, a source region, and a drain region at an upper portion of the substrate. The active region is located between the source and drain regions. A gate electrode is located on the active region. A source electrode is located on the source region and forms an ohmic contact with the source region. A drain electrode has a base part on and in ohmic contact with the drain region and an extended part having edge close to the gate electrode and over a boundary between the active region and the drain region. An insulating film is located between the boundary and the extended part and has a thickness that increases along a direction from the drain electrode toward the gate electrode in a step-by-step or continuous manner.

Field effect transistor

There are provided an electric contact device for establishing reliable contact with ball contactors or strip contactors of a semiconductor device over contact areas of great area; a semiconductor device test socket using the electric contact device; a semiconductor module using the electric contact device; and a semiconductor device test method. A contact lead having a ring-shape or helical section is provided between a support pole and a movable pole. The movable pole is moved, to thereby bring the contact lead into an expanded state in which the diameter of the ring-shape or helical section becomes larger. A contactor is inserted into the ring-shape or helical section. The contact lead is then brought into a contacted state such that the diameter of the ring-shape or helical section becomes smaller, wherewith the contact lead is wrapped around the periphery of the contactor.

Electric contact device for establishing an improved contact with contactors of other device

Sample chips are tested after determining the chip layout on a semiconductor wafer so that one or plural ones of untested chips are surrounded by plural ones of the sample chips that adjoin the untested samples. A good/defective judgment on the untested chips is performed by using predicted good/defective judgment results that are statistically predicted based on results of the sample test and stored statistical data of a defect generation profile including address information that indicates defective chip locations. As a result, the good/defective judgment can be performed with high accuracy even in a case where defective chips are localized in a particular region on the wafer in a concentrated manner.

Growing community of inventors

Tokyo, Japan

Yoshitaka Kamo