Alps Electric Co., Ltd.

Yoshitaka Hirose

Yasuhiro Ikarashi

Senichiro Yatsuda

A computer of the present invention contains: a CPU; plural peripheral devices controlled by the CPU; a data transmission bus between the CPU and the peripheral devices and between the peripheral devices; and a clock signal source for supplying clock signals for CPU operation and data transmission. The clock signal source contains a PLL synthesizer, and two clock signals (one for the CPU and the other for the bus) are outputted from the PLL synthesizer to stop unnecessary signals (other than the clock signals) from being produced.

Computer containing clock source using a PLL synthesizer

The electronic circuit unit of the present invention includes first and second insulating substrates on respective surfaces of which wiring patterns are formed, and thick-film passive elements formed on the surfaces of the first and second insulating substrates in a state in which they are connected to the wiring patterns, wherein the first and second insulating substrates are disposed vertically opposite to each other, and the wiring patterns provided on the first and second insulating substrates are connected through metallic bumps provided between the first and second insulating substrates.

Electronic circuit unit suitable for miniaturization

A transmitter-receiver of the TDMA/TDD type which includes a phase control loop controlled in such a manner that the loop is turned on during the time slot just preceding each of a transmission time slot and a reception time slot, and the loop is turned off during all other time periods including the transmission time slot and the reception time slot. The voltage controlled oscillator includes a variable capacitance diode which produces an output frequency in response to a frequency control voltage received from a charge pump when the loop is closed, and in response to a charging voltage supplied from a loop filter when the loop is open. When the loop is closed, a phase comparator compares a reference frequency signal with an output frequency signal of the voltage-controlled oscillator and generates error signals for controlling the charge pump. A state switching unit switches the state of the phase comparator between an operating state, when the loop is closed, and a stand-by state in response to a power saving signal when the loop is open. A bias supply unit applies a variable bias voltage to an anode of the variable capacitance diode. The variable bias voltage varies in nearly the same manner as the charging voltage supplied to a cathode of the variable capacitance diode from the loop filter when the phase comparator is in a stand-by state, thereby maintaining the voltage across the variable capacitance diode at a relatively constant level such that the output frequency signal is maintained at a desired level.

Growing community of inventors

Fukushima-ken, Japan

Yoshitaka Hirose