Mitsubishi Denki Kabushiki Kaisha

Yoshitada Iyama

Noriharu Suematsu

Masayoshi Ono

Fumimasa Kitabayashi

Makoto Matsunaga

Kazuyoshi Inami

Fumio Takeda

Tadashi Kawahara

Michiaki Kasahara

Hazime Kawano

Mikio Uesugi

Kohichi Muroi

Kensuke Nakajima

Kenji Hiroshige

An operational command signal is output to one of an amplifier or a variable damper depending on the signal level of a high frequency signal.

Semiconductor circuit

An unbalance-to-balance converter includes an FET and a balanced output adjusting capacitor connected between the source terminal of the FET and an earth conductor. The balanced output adjusting capacitor has a capacitance value equal to a capacitance difference Cpd-Cps between a drain side parasitic capacitance Cpd and a source side parasitic capacitance Cps. This makes it possible to solve a problem involved in a conventional unbalance-to-balance converter in that when the drain side parasitic capacitance Cpd differs from the source side parasitic capacitance Cps, a pair of balanced signals output from the drain terminal and source terminal do not have the same amplitude and are not in complete opposition.

Unbalance-to-balance converter utilizing a transistor

A radio frequency circuit is disclosed which includes a low-noise amplifier and a mixer integrated on the same semiconductor chip by using a silicon BiCMOS process. The low-noise amplifier has a silicon bipolar junction transistor and the mixer has a silicon MOS type field effect transistor. In the radio frequency circuit, the mixer can include two silicon MOS type field effect transistors one of which has a source connected to a drain of the other silicon MOS type field effect transistor and a gate of one silicon MOS type field effect transistor is supplied with a local signal and a gate of the other silicon MOS type field effect transistor is supplied with a radio frequency signal amplified by the low-noise amplifier.

Radio frequency circuit with integrated elements and method of

A phase shifter, which can switch between a phase delay circuit and a phase leading circuit consisting of inductors and capacitors, is constituted by disposing FETs having inductors or capacitors arranged in parallel with the source and drain electrodes of each FET connected and controlling a bias voltage to be applied to the gate electrodes of the FETs to switch between the on and off conditions of the FETs. Thus, a phase shifter obtained has a small frequency characteristic.

Phase shifter circuit using field effect transistors

A microwave semiconductor switch wherein first and second field effect transistors and first, second and third input/output microstrip lines are integrally formed on a semiconductor substrate. The first field effect transistor is connected in series between the second input/output line and a junction point of the first, second and third input/output lines at a position adjacent to the junction point. The second field effect transistor is connected at a second position spaced approximately a quarter of the wavelength from the junction point between the second position and the ground. The drain electrodes and source electrodes of the first and second transistors are placed at the same potential. The transmission paths for microwaves are switched by varying a bias voltage applied to the gate electrodes of the field effect transistors.

Microwave semiconductor switch

Growing community of inventors

Tokyo, Japan

Yoshitada Iyama