Nec Corporation

Pioneer Corporation

Hoya Lens Thailand Ltd.

Panasonic Corporation

Yoshio Sano

Keiji Nunomura

Tadashi Nakamura

Toshiyuki Akiyama

Masahiro Shimizu

Yoshito Tanaka

Nobumitsu Aibara

Naoto Hirano

Mitsuo Ueoka

Yoshiaki Yanai

Kazuaki Yanagida

Tetsumasa Okamoto

Hirokazu Tateno

Masataka Ohba

Hiroshi Shimizu

Kazuaki Utsumi

Masahisa Kousaka

Yukio Kageyama

Hachiro Yamada

Tomofumi Ohnishi

Masayuki Noborio

Masataka Oba

A polymerizable composition for optical components, which can prevent striae while keeping strength for optical components when a thick optical component is produced. A polymerizable composition for optical components is a mixture of a first composition including a polyisocyanate compound (A) and a second composition including a polythiol compound (B1) and a thiol group-containing substance (B2), the composition includes the thiol group-containing substance (B2) showing peak at a position at retention time three minutes or more from a peak of the polythiol compound (B1) in a chromatogram obtained by analyzing the composition by high performance liquid chromatography (HPLC) analysis, and the ratio (A/B1) is 80/100 to 95/100, wherein the equivalent ratio (A/B1) is an equivalent A of the polyisocyanate compound (A) using a weight and group number of the polyisocyanate compound (A) to B1 of the polythiol compound (B1) using a weight and group number of the polythiol compound (B1).

Polymerizable composition for optical members, optical member and eyeglass lens

A lens-mold producing method includes a position and posture determining step of specifying positions and postures, in space coordinates, of a first mold having a molding surface for forming one optical surface of a lens and a second mold having a molding surface for forming the other optical surface, a mold holding step of rotating and/or inclining, based on the positions and postures in the space coordinates, at least one of the first and second mold, maintaining a rotation angle and/or an inclination angle of a reference plane of the first mold with respect to a reference plane of the second mold, and holding the first and second mold, and an assembling step of arranging the molding surfaces of the first and second mold so as to face each other, fixing outer peripheries of the first mold and the second mold, and assembling a lens mold.

Method for manufacturing lens forming mold, method for manufacturing eyeglass lens, and eyeglass lens

Ribs for defining pixel cells are formed in the shape of a lattice, and sustain electrodes and scan electrodes are disposed near the ribs. The electrodes are spaced apart in each pixel cell, and the sustain electrode and the scan electrode are each cut away between pixel cells arranged in the row direction to provide each pixel cell with individually separated electrodes. In addition, between pixel cells adjacent to each other in the row direction, the sustain electrodes and the scan electrodes are connected to each other by means of a sustain-side bus electrode and a scan-side bus electrode, respectively. This makes it possible to provide a high luminous efficiency. Furthermore, each pixel cell is provided with a wide distance between the electrodes and thereby with a large effective opening portion. Thus, this provides only a small amount of reduction in intensity when the electrodes are spaced apart between the pixel cells arranged in the row direction in order to increase the luminous efficiency. The sustain electrodes or the scan electrodes can be connected to each other or shared between pixel cells adjacent to each other in the column direction and thus the effective opening portion can be made larger, thereby making it possible to provide a further increased intensity and luminous efficiency.

Plasma display panel and method for fabricating the same

To provide a plasma display device which implements a peak luminance higher than prior art, reduces the power dissipation, improves the smoothness of gradation display, and conducts clear display suitable especially for TV display. By setting a plurality of APL levels according to the average value of the scene brightness, and by shortening a sustaining pulse period and increasing the number of sustaining pulses of each sub-field in APL levels having small APL, the peak luminance is raised. Further, by making the sustaining pulse period long in APL levels having large APL requiring large discharge light emission power, the light emission efficiency is improved and the maximum power dissipation is reduced. The luminance distribution in the scene when the APL level is small is detected. On the basis of that information, setting of the number of sustaining pulses and the sustaining pulse period is changed in the same APL level. As a result, the peak luminance is increased, and the gradation smoothness in the dark scene is improved.

Method and apparatus for enhancing peak luminance on plasma display panel

Ribs for defining pixel cells are formed in the shape of a lattice, and sustain electrodes and scan electrodes are disposed near the ribs. The electrodes are spaced apart in each pixel cell, and the sustain electrode and the scan electrode are each cut away between pixel cells arranged in the row direction to provide each pixel cell with individually separated electrodes. In addition, between pixel cells adjacent to each other in the row direction, the sustain electrodes and the scan electrodes are connected to each other by means of a sustain-side bus electrode and a scan-side bus electrode, respectively. This makes it possible to provide a high luminous efficiency.

The PDP is divided into a plurality of scan blocks. Immediately before a write discharge period of each scan block, a pre-discharge erasing period or a pre-discharge period and a pre-discharge erasing period is or are established. To minimize the period of time from the pre-discharge to the write discharge, the pre-discharge and the pre-discharge erasing are conducted for each of the scanning and sustaining electrode blocks or in a sequential manner. Furthermore, a first sustaining discharge period of a short time is disposed immediately after the write discharge period for each scan block and a second sustaining discharge period for all display cells is arranged after the write discharge of all scan blocks.

Method of driving plasma display panel having improved operational margin

In order to improve the yield of the electrode manufacture with a highly capacity, highly fine panel structure and obtain highly efficient light emission with high intensity, the invention proposes a method of driving an electric discharge display panel, which has a color pixel array of vertical stripes type, pluralities of parallel scan and sustained discharge electrodes provided alternately on the same insulating substrate as that with the color pixel array thereon and having a double side discharge electrode structure striding two adjacent panel columns, and a plurality of column electrodes extending perpendicular to and insulated from the scan electrodes and sustained discharge electrodes. Independent display for each pixel column and the same display for two pixel columns are caused by adopting simultaneous two pixel column writing in a write period and adopting a novel phase differences for sustained discharge waveform. It is thus possible to obtain ready electric discharge display panel operation control and ready high intensity interlace display.

Method of driving electric discharge panel

The scan electrodes are divided into a plurality of groups. These scan electrode groups are divided into those of a scan period and those of a non-scan period in a writing discharge period. A compensation pulse is applied, without application of a scan base pulse, to the electrodes in the non-scan period. Thus it makes possible to suppress electromigration between scan and sustaining electrodes while securing light intensity of emission as in the prior art by using the same techniques as therein.

Plasma display panel and method of driving plasma display panel

A driver circuit for a plasma display panel has first, second, third, and fourth switches. The first switch is connected to the higher potential side of a sustaining pulse power supply and supplies a current to sustaining electrodes. The second switch is connected to the lower potential side of the sustaining pulse power supply and draws a current from the sustaining electrodes. The third switch is connected to the higher potential side of the sustaining pulse power supply and supplies a current to the scanning electrodes. The fourth switch is connected to the lower potential side of the sustaining pulse power supply and draws a current from the scanning electrodes. Diodes are connected to sustaining electrode blocks for preventing pulses to be generated independently in the sustaining electrode blocks from going around to other sustaining electrode blocks, and diodes are also connected to scanning electrode blocks for preventing pulses to be generated independently in the scanning electrode blocks from going around to other scanning electrode blocks.

Driver circuit for AC-memory plasma display panel

A capacitive load drive is provided, which can perform faster and more efficient operation than an energy recovery circuit for effectively reducing ineffective energy of pulses applied to a capacitive load. An energy recovery circuit is connected to a first electrode of the capacitive load, to which pulses are applied. The energy recovery circuit comprises a coil and a capacitor connected in series for energy recovery, and a first and a second voltage clamp switches connected to the other terminal of the series circuit of the coil and the capacitor, the first voltage clamp switch being connected to a high voltage side terminal of the DC power supply, the second voltage clamp switch being connected to a low voltage side terminal of the DC power supply.

Driver for display panel

A driver circuit applies data pulses to column electrodes of a display panel. The display panel includes a plurality of row electrodes formed in a plane in parallel to each other and a plurality of column electrodes formed to be isolated from the row electrodes, parallel to each other, and orthogonal to the row electrodes. To collect charge, a circuit to drive column electrodes is connected to charge collecting coils and capacitors. There is further employed an output circuit of an IC having a switch dedicated for charge collection.

Matrix display panel driver with charge collection circuit used to

The plasma display panel driver circuit disclosed includes a panel inter-electrode capacitor, a charging/discharging circuit, and a voltage clamp circuit. The panel inter-electrode capacitor is provided between scanning and sustain electrodes of a panel. The charging/discharging circuit is connected in parallel with the panel inter-electrode capacitor and formed by a combination of a coil, FET switches and reverse current blocking diodes. The voltage clamp circuit includes four switches connected to terminals of the panel inter-electrode capacitor. The panel inter-electrode capacitor, together with a series circuit of the coil and the FET switches, forms a parallel resonance circuit. The panel inter-electrode capacitor 40 is repeatedly charged and discharged through the control of the switches with switch drive inputs. In the driving of a plasma display panel, ineffective power is reduced when charging and discharging the panel inter-electrode capacitor.

Growing community of inventors

Tokyo, Japan

Yoshio Sano