Azbil Corporation

Yoshio Maehana

Kouji Okuda

Hiroaki Nagoya

A variable impedance circuit is provided as an active load between an input line L1 and an output line L2. This circuit has low impedance with respect to a DC electric current signal and has high impedance with respect to an AC electric current signal, structured from a series circuit of resistors R1, R2, and R3 connected between lines L1 and L2; a transistor Q1 having the collector connected to the line L1 and the base connected between the resistors R2 and R3; a resistor R4 connected between the emitter of the transistor Q1 and the line L2; a capacitor C1 with one end connected between the resistors R2 and R3; a resistor R5 connected between the other end of the capacitor C1 and the line L2; a capacitor C2 having one end connected between the resistors R1 and R2; and a resistor R6 connected between the other end of the capacitor C2 and the line L2.

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Yokohama, Japan

Yoshio Maehana