Sony Corporation

Winbond Electronics Corporation

Fuji Xerox Co., Ltd.

Toray Industries, Inc.

Kyoto University

Sharp Kabushiki Kaisha Corporation

Mitsubishi Hitachi Power Systems, Ltd.

Fujitsu Corporation

Nissan Motor Company Limited

Renesas Electronics Corporation

Sony Semiconductor Solutions Corporation

Nsk Corporation

Mitsubishi Power, Ltd.

Fujitsu Display Technologies Corporation

Stanley Electric Co., Ltd

Yoshinori Tanaka

Wei-Che Chang

Shunichi Hashimoto

Takeshi Matsui

Toshio Narushima

Hideaki Ohmuro

Hiroyasu Inoue

Hitoshi Nobumasa

Satoko Kozono

Manabu Sawasaki

Tomonori Tanose

Yoji Taniguchi

Kai Jen

Hiroshi Mukawa

Yoshihiro Kuwamura

Osamu Nomura

Takayuki Yamada

Masahiro Shimizu

Susumu Noda

Kazuaki Takesako

Masahiro Ikeda

Osamu Akimoto

Akira Kawamura

Hiroharu Oyama

Takuji Yoshida

Masanori Kato

Hiroshi Okabe

Menaka De Zoysa

Giman Jung

Hideo Akiyama

Tomio Onuki

Tatsuaki Fujikawa

Kei Emoto

Satoko Kanamori

Aiko Takayama

Junichi Sonoda

Tomoaki Koizumi

Gozoh Tsujimoto

Wei-Chih Liu

Michimoto Kobayashi

Chih-Wei Hsiung

Chun-Chiao Tseng

Akira Myomoto

Yoshiharu Sakai

Yukihiro Nagai

Meng-Hsien Chen

Yutaka Shimada

Yu-Ling Huang

Chung-Yung Ai

Shiori Tomoda

Takeshiro Nakatsue

Hirotake Fujita

Tomohiro Kadoya

Hsuan-Yu Fang

Yu-Shan Hsu

Chun-Hua Huang

Takeshi Takahashi

Hideaki Arima

Takashi Ogawa

Shin Nishimoto

Hideaki Sugishita

Kazuyuki Matsumoto

Osamu Ogawa

Teruhisa Ninomiya

Masafumi Tsutsui

Nobusuke Toukura

Keisuke Kubo

Shuji Kobayakawa

Atsushi Funada

Takahiko Uchiyama

Kiyohito Horii

Hideki Kuge

Seigo Shinozaki

Toshimi Takajo

Naoto Tochitani

Noriaki Ikeda

Hiromitsu Asai

Yoshinori Iwasaki

Kazutaka Manabe

Ying-Chu Yen

Yi-Hao Chien

Shinjiro Umeya

Tomio Ohnuki

Tomoya Kimura

Junichi Ishiguro

Wen Kuei Hsu

Wen-Kuei Hsu

Kenji Ishizaki

An unnecessary circuit operation in a clock enabler circuit accompanying toggling of a clock signal is suppressed. A state holding unit performs a holding operation of a state as to whether or not to output an output clock signal according to an internal clock signal. A clock signal output unit controls output of the output clock signal according to the state held in the state holding unit. A control unit supplies, to the state holding unit, the internal clock signal and a value of the state that are necessary for the holding operation in the state holding unit on a basis of a clock signal and a clock enable signal from an outside.

Clock enabler circuit

A method of manufacturing a dynamic random access memory including the following steps is provided. A bit line is formed on a substrate. A sidewall structure is formed on a sidewall of the bit line. The sidewall structure includes a first insulation layer, a second insulation layer, and a shield conductor layer. The first insulation layer is disposed on the sidewall of the bit line. The second insulation layer is disposed on the first insulation layer. The shield conductor layer is disposed between the first insulation layer and the second insulation layer. An interconnection structure electrically connected to the shield conductor layer is formed.

Methods of manufacturing dynamic random access memory

Provided is a semiconductor isolation structure including: a substrate having a first trench in a first region of the substrate and a second trench in a second region of the substrate; a filling layer is located in the first trench and the second trench; a liner layer on the sidewalls and bottom of the first trench and the second trench; a fixed negative charge layer is located between the filling layer and the liner layer in the first trench and the second trench; and a fixed positive charge layer located between the fixed negative charge layer and the liner layer in the first trench. The liner layer, the fixed positive charge layer, the fixed negative charge layer and the filling layer in the first trench form a first isolation structure. The liner layer, the fixed negative charge layer and the filling layer in the second trench form a second isolation structure.

Semiconductor isolation structures having different configurations in different device regions and method of forming the same

A dynamic random access memory (DRAM) and methods of manufacturing, writing and reading the same. The DRAM includes a substrate, a bit line, a sidewall structure and an interconnection structure. The bit line is disposed on the substrate. The sidewall structure is disposed on a sidewall of the bit line. The sidewall structure includes a first insulation layer, a second insulation layer, and a shield conductor layer. The first insulation layer is disposed on the sidewall of the bit line. The second insulation layer is disposed on the first insulation layer. The shield conductor layer is disposed between the first insulation layer and the second insulation layer. The interconnection structure is electrically connected to the shield conductor layer. The DRAM and the manufacturing, writing and reading methods thereof can effectively reduce the parasitic capacitance of the bit line.

Dynamic random access memory and methods of manufacturing, writing and reading the same

A sealing device for suppressing a leakage flow of a fluid via an annular gap between a stationary member and a rotary member of a rotary machine includes: a fixed fin having an annular shape and disposed in the annular gap; and a movable fin having an annular shape and being disposed adjacent to the fixed fin in an axial direction inside the annular gap. The movable fin has a greater thermal expansion coefficient than the fixed fin and is fixed to the fixed fin in a fixing region on a root-end side of the movable fin.

Sealing device and rotary machine

A powder passage component includes a first passage defining unit, a second passage defining unit, and a sealing section. The first passage defining unit has at least a first connecting opening which is formed at a part thereof and which has a first peripheral edge. The first passage defining unit defines a passage space which allows powder to pass therethrough. The second passage defining unit has a second connecting opening having a second peripheral edge, is connected to the first connecting opening of the first passage defining unit at the second connecting opening, and defines a passage space which allows the powder to pass therethrough. The sealing section seals the first peripheral edge and the second peripheral edge. The sealing section includes a liquid gasket. The sealing section has a groove that has a bottom portion and a side facing the corresponding passage space. The groove is formed along one of the first peripheral edge and the second peripheral edge. The liquid gasket is applied to an inside of the groove and elastically deformed so as to be brought into contact with another of the first peripheral edge and the second peripheral edge facing the groove. The sealing section has at least one escape groove that is provided at the bottom portion of the groove or along the other of the first peripheral edge and the second peripheral edge facing the groove. The at least one escape groove allows a part of an elastically deformed portion of the liquid gasket to escape so as not to allow the liquid gasket to extend past at least the side of the groove facing the corresponding passage space.

Powder passage component and powder processing apparatus using powder passage component

A sealing structure that seals a clearance between an outer peripheral surface of a rotor and an inner peripheral surface of a stator. The sealing structure includes: a plurality of step portions that are provided on a first surface which is one of the outer peripheral surface of the rotor and the inner peripheral surface of the stator so as to be arranged in the axial direction, and that protrude from the first surface toward a second surface which is the other of the outer peripheral surface of the rotor and the inner peripheral surface of the stator; and a seal fin that is provided on the second surface, and that forms a small clearance between a corresponding peripheral surface of the step portions. A portion in the vicinity of a tip of the seal fin in the radial direction is inclined toward the upstream side.

Sealing structure and rotary machine

A memory device includes a semiconductor substrate having at least one active area that is defined by a device isolation structure. The memory device further includes two neighboring buried word lines disposed in the semiconductor substrate of the active area. The memory device further includes a trench isolation structure disposed in the semiconductor substrate between the buried word lines.

Memory device including a trench isolation structure between buried word lines and manufacturing method thereof

A semiconductor structure includes a substrate, and first isolation structures, at least one buried word line and at least one second isolation structure which are disposed in the substrate. The buried word line intersects the first isolation structures. The second isolation structure intersects the first isolation structures. A material of at least a portion of the second isolation structure is different from a material of the first isolation structures.

Semiconductor structure and manufacturing method thereof

Provided is a memory device including a substrate, isolation structures, conductive pillars, and bit-line structures. The substrate includes active areas. The active areas are arranged as a first array. The isolation structures are located in the substrate and extending along a Y direction. Each of the isolation structures is arranged between the active areas in adjacent two columns. The conductive pillars are located on the substrate and arranged as a second array. The conductive pillars in adjacent two rows are in contact with the active areas arranged as the same column, to form a first contact region and a second contact region. The bit-line structures are arranged on the substrate in parallel along a X direction. Each of the bit-line structures is in contact with the active areas arranged as the same column, to form a third contact region between the first and second regions.

Memory device and manufacturing method thereof

A developer supply device includes a container body that receives and contains a developer with which a toner cartridge is filled and that has a supply port used for supplying the developer, which is contained in the container body, to a developing device, a sensing member that detects the developer contained in the container body, a first transport member that is rotatably disposed in the container body and that transports the developer at a first transport speed by rotating, and a second transport member that is rotatably disposed in the container body in such a manner as to face the sensing member and that transports the developer at a second transport speed that is higher than the first transport speed by rotating.

Image forming apparatus and developer supply device with first and second transport members configured to transport developer at different speeds

An image forming apparatus includes a removable-body receivable member and a container member. The removable-body receivable member removably supports a removable body containing a developer. The removable-body receivable member has an opening at a near portion in an insertion/removal direction in which the removable body is inserted into or removed from the removable-body receivable member. The container member is connected to the opening to contain the developer.

Image forming apparatus with removable-body receivable member and reclaim container member

A memory device and a method for manufacturing a memory device are provided. The memory device includes a semiconductor substrate having a trench, an oxide layer formed on a surface of the trench, and a buried word line formed in the trench having the oxide layer formed thereon. The oxide layer includes a first portion extending downward from a top surface of the semiconductor substrate, a second portion extending upward from a bottom portion of the trench, and a third portion formed between and adjoining the first portion and the second portion. The third portion tapers toward the second portion. The first portion of the oxide layer is located between the buried word line and the surface of the trench.

Memory device with buried word line for reduced gate-induced drain leakage current and method for manufacturing the same

A dynamic random access memory (DRAM) includes a substrate, a plurality of isolation structures, a plurality of conductive structure sets, a plurality of bit-line structures, and a plurality of spacers. The substrate has a plurality of active areas. The isolation structures are located in the substrate and extending along a first direction. Each of the isolation structures is disposed between two adjacent active areas. The conductive structure sets are disposed in parallel along the first direction and on the substrate. The bit-line structures are disposed in parallel along a second direction and on the substrate. The bit-line structures penetrate through the conductive structure sets. The spacers are disposed in parallel along the second direction and on sidewalls of the bit-line structures, so as to electrically isolate the bit-line structures from the conductive structure sets.

Dynamic random access memory and method of manufacturing the same

A developing device includes a housing that includes an accommodating chamber, a development opening, and a discharge opening, part of developer that is accommodated in the accommodating chamber overflowing into and being discharged from the discharge opening; a developing roller that holds and transports the developer that is supplied from the accommodating chamber; a transporting member that transports the developer in the accommodating chamber so as to supply the developer to the developing roller while stirring the developer; a regulating member that regulates a thickness of a layer of the developer that is held by the developing roller by holding back part of the developer; and a ventilation path portion that is provided so as to extend through the regulating member, the ventilation path portion being connected to a gap space that exists in a range extending to the development opening from where the developing roller passes the regulating member.

Developing device and image forming apparatus

Growing community of inventors

Kanagawa, Japan

Yoshinori Tanaka