Onkyo Corporation

C.uyemura Co., Ltd.

Yoshinori Nakanishi

Mamoru Sekiya

Tsuyoshi Kawaguchi

Norimasa Kitagawa

Kei Asao

Hiroyuki Asahara

Makoto Yoshida

Takanori Shiozaki

Masayuki Utsumi

Hisamitsu Yamamoto

Yoshikazu Saijo

Tomoji Okuda

Koichi Sadaie

Yoshitada Takeshima

Yutaka Nishinaka

Ryuta Shigematsu

Hiroki Kurosaki

Mitsuhiko Tokuda

A diffuser which forms a first acoustic passage that sound waves propagate and which radiates the sound waves to an outer diameter direction between a diaphragm and an annular conical surface of a first reflection member, and forms a second acoustic passage the sound waves which pass the opening of the first reflection member propagate and which radiates the sound waves to an outer diameter direction between the annular concave surface of the first reflection member and a conical surface of a second reflection member.

Diffuser

An ultrasonic treatment apparatus including: an ultrasonic bath for performing an ultrasonic treatment on a treatment target object; a first ultrasonic vibrator provided on the front surface side of the treatment target object; and a second ultrasonic vibrator provided on the back surface side of the treatment target object; wherein the first ultrasonic vibrator does not face the second ultrasonic vibrator.

Ultrasonic treatment apparatus

To resolve volume shortage of middle and high band of speaker reproduction sound. A DSPperforms LPF processing to extract low frequency component of an audio signal to which the first volume processing is performed, DRC processing to compress the audio signal to which the LPF processing is performed in case that the audio signal to which the LPF processing is performed is not less than a predetermined signal level, HPF processing to extract high frequency component of the audio signal to which the first volume processing is performed, second volume processing to attenuate the audio signal to which the HPF processing is performed based on the volume value that is received, and synthesis processing to synthesize the audio signal to which the DRC processing is performed and the audio signal to which the second volume processing is performed.

Signal processing device, signal processing method, and speaker device

Provided is a modulation circuit that can correct an output state in real time and reliably modulate an input signal to output the modulated signal. The signal modulation circuit includes a subtractor, an integrator, a chopper circuit, a frequency divider, and a D-type flip-flop. A delay circuit of a sigma delta modulation circuit is not provided to a feedback circuit, and a signal is delayed and quantized in the D-type flip-flop. The chopper circuit inserts a zero level at timing synchronized with a clock signal, so that pulse density modulation is performed.

Signal modulation circuit

To realize active control ground that sets inverted output of an amplification circuit to ground with simple configuration. A DAPcomprises a positive side DACthat D/A-converts digital audio data into analog audio data, a positive side amplification circuitthat amplifies the analog audio data that the DACD/A-converts, a negative side DACthat D/A-converts the digital audio data into the analog audio data, and a negative side amplification circuitthat amplifies the analog audio data that the DACD/A-converts, and a CPU. The CPUmutes the DACin case of an ACG mode that sets output of the amplification circuitto ground.

Music reproducing device with active control ground mode

To reduce signal output and wiring to a D/A converter (DAC). A DAPcomprises a DACthat D/A-converts LRchannels digital audio data into LRchannels analog audio data, an amplification circuitthat amplifies the LRchannels analog audio data that the DACD/A-converts, a DACthat D/A-converts the LRchannels digital audio data into the LRchannels analog audio data, and an amplification circuitthat amplifies inverted LRchannels analog audio data that the LRchannels analog audio data that the DACD/A-converts is inverted.

Music reproducing device with first and second D/A converters for converting audio signals prior to inversion

Provided is a circuit which can correct an output state in real time and reduce influences of distortion/noise components generated by a delay device. A signal modulation circuit includes a subtractor, an integrator, a phase inverting circuit, a DFF for while inserting a zero level at timing synchronous with the clock signal, delaying and quantizing the signal, a ternary signal generating circuit for generating a ternary signal for selectively driving a load connected to a single power supply into ternary conductive states including a positive current on-state, a negative current on-state, and an off-state, a driver circuit for generating a driving signal for driving a load, and a feedback circuit for feeding back the driving signal from the driver circuit to the input signal.

A signal modulation circuit includes a feedback circuit configured to generate the feedback signal for feeding back a drive signal from a driver circuit to an input signal. The feedback circuit includes at least first and second resistors connected together in series, the second resistor having a higher resistance value than that of the first resistor. One end of the first resistor is connected to a subtracter, and one end of the second resistor is connected to the driver circuit. A first line distance as the line length between one end of the first resistor and the subtracter and a second line distance as the line length between one end of the second resistor and the driver circuit are set shorter than a third line distance as the line length between the other end of the first resistor and the other end of the second resistor.

Provided is a modulation circuit that can correct an output state in real time and reliably modulate an input signal to output the modulated signal. The signal modulation circuit includes a subtracter, an integrator, a chopper circuit, a frequency divider, and a D-type flip-flop. A delay circuit of a sigma delta modulation circuit is not provided to a feedback circuit, and a signal is delayed and quantized in the D-type flip-flop. The chopper circuit inserts a zero level at timing synchronized with a clock signal, so that pulse density modulation is performed.

A circuit having versatility synthesizes one-bit digital signals to generate a ternary signal. The pulse synthesizing circuit synthesizes one-bit digital signals from two DFFs to generate a ternary signal. The pulse synthesizing circuit has a first NOR gate, a second NOR gate, a third NOR gate, and three switches. The first switch is connected to a first electric potential, the second switch is connected to a second electric potential, and the third switch is connected to a third electric potential. The first to third switches are turned on/off according to logical values of the signals from the two DFFs, and any of the first electric potential, the second electric potential, and the third electric potential is set as an output potential so that a ternary signal is generated.

Pulse synthesizing circuit

A pulse width modulation signal with a less distortion component that is not influenced by a common-mode noise or an offset voltage is generated. Pulse signal generation circuitsgenerate pulse signals S, Swhose pulse widths are discharge times t, tof integrators, respectively, a PWM signal generation circuitdetects discharge end timings of the integratorsbased on the pulse signals S, S, and a pulse whose pulse width is a time between discharge end timing of one of the integratorsand discharge end timing of the other one of the integratorsis generated so as to be output as a PWM signal S.

Pulse width modulator and switching amplifier

A pulse width modulation circuit of the present invention changes a voltage of a charging circuit based on an input signal voltage and in synchronization with a first switching signal; changes, during a predetermined second period following a first period during which the voltage of the charging unit is changed, the voltage of the charging unit in an opposite direction to a direction in which the voltage is changed during the first period, based on a constant bias current; detects time starting from when the second period starts to when the voltage of the charging unit reaches a predetermined reference voltage; and generates, based on the detected time which is repeatedly output each time the first switching signal is output, a pulse signal having a pulse width of the time.

Pulse width modulation circuit and switching amplifier using the same

When a switching amplifier transitions into a power-off state, a switch is turned off and a power supply controller forcibly discharges a capacitor and forcibly reduces a reference potential with respect to a second power supply voltage. Since a logic power supply voltage reduces by the same amount as the reference potential, the logic power supply voltage from a viewpoint of the reference potential is fixed. A constant current circuit reduces a constant current according to the reduction in the reference potential with respect to the second power supply voltage, and reduces a first electric current and a second electric current. Before the logic power supply voltage from the viewpoint of the reference potential reduces, the first electric current and the second electric current are reduced, and an operation of a pulse generating unit can be ended in a normal state.

Switching amplifier

When an output voltage from the amplifying circuit includes a positive DC voltage, an electric current continuously flows in a power source voltage, a load, and a reference voltage in this order. As a result, the reference voltage increases so as to be a first threshold voltage or more . The detecting section detects that the reference voltage is the first threshold voltage or more. When the output voltage from the amplifying circuit includes a negative DC voltage, an electric current continuously flows in the reference voltage, the load, a grounding potential in this order. As a result, the reference voltage reduces so as to be a second threshold voltage or less. The detecting section detects that the reference voltage is the second threshold voltage or less.

Amplifying circuit

A pulse width modulation circuit includes a first electric-charge accumulator; a second electric-charge accumulator; a first current generator which generates a first current corresponding to the amplitude of an input AC voltage; a second current generator which generates a second current with a constant value; a first current supply controller which supplies the first current to the first electric-charge accumulator; a second current supply controller which supplies the second current to the first electric-charge accumulator; a third current supply controller which supplies the first current to the second electric-charge accumulator; a fourth current supply controller which supplies the second current to the second electric-charge accumulator; and a current limiter which limits the first current to a third current with a predetermined current value, if the amplitude of the AC voltage in the negative side exceeds a predetermined level.

Growing community of inventors

Osaka, Japan

Yoshinori Nakanishi