Mitsubishi Electric Corporation

Mitsubishi Denki Kabushiki Kaisha

Japan Aerospace Exploration Agency

Yoshinori Matsuno

Kenichi Ohtsuka

Hiroaki Morikawa

Satoshi Arimoto

Kenichi Kuroda

Yoichiro Tarui

Hideo Naomoto

Naoki Yutani

Hajime Sasaki

Hiroshi Watanabe

Hiroshi Sugimoto

Masayuki Imaizumi

Kensuke Taguchi

Yoshitatsu Kawama

Yasushi Takaki

Shozo Shikama

Kosuke Miyazaki

Naruhisa Miura

Takashi Ishihara

Kenichi Hamano

Noboru Mikami

Yoichiro Nishimoto

Hisao Kumabe

Toshikazu Tanioka

Akihiro Takami

Yasunori Oritsuki

Toshio Murotani

Naochika Hanano

[Object] To suppress the influence of uncertainties on a time of arrival while reducing the number of speed adjustments or the like to suppress the deterioration of fuel efficiency and comfort. [Solving Means] An information processing apparatusincludes: an uncertainty estimation unitthat quantifies, using an actual measured value, an uncertain predicted value that affects a time of arrival at a target point of a mobile object, and calculates a probability distribution of the uncertain predicted value; an estimated-time-of-arrival estimation unitthat calculates, using the probability distribution of the uncertain predicted value, a probability distribution of an estimated time of arrival at the target point when a current control input is used, the control input being a control input to the mobile object and affecting the time of arrival at the target point; and a time-of-arrival control unitthat determines, in the probability distribution of the estimated time of arrival at the target point, whether a first statistic of the estimated time of arrival with respect to a required time of arrival at the target point when the current control input is used falls outside a first threshold, and sets the control input to increase a possibility that a second statistic of the estimated time of arrival with respect to the required time of arrival is within an allowable range in the probability distribution of the estimated time of arrival at the target point if the first statistic falls outside the first threshold.

Program, information processing apparatus, and information processing method

A method for manufacturing a semiconductor device includes forming, on first and second impurity layers on a termination region side, an insulating layer, forming a first metal film and a second metal film in this order on the insulating layer and a drift layer, performing dry etching on the first and second metal films all together so that a position of a first end of a metallized layer, which is a remaining part of the first metal film, in the interface region on the termination region side and a position of a second end of an electrode, which is a remaining part of the second metal film, in the interface region on the terminal region side are the same in plan view. The first and second ends are closer to the active region than an end of the second impurity layer on the termination region side in plan view.

Method for manufacturing semiconductor device

A semiconductor device includes an insulating layer provided on a first impurity layer and a second impurity layer on a termination region side, a metallized layer provided on the first impurity layer and the second impurity layer exposed from the insulating layer and on the insulating layer, and an electrode provided on the metallized layer. A position of a first end of the metallized layer on the termination region side and a position of a second end of the electrode on the termination region side are the same in plan view.

Semiconductor device and method for manufacturing semiconductor device

In some examples, a semiconductor device includes a substrate, an interlayer insulating film, a gate pad provided on the interlayer insulating film, a source electrode that is provided on the interlayer insulating film, source wiring provided on the interlayer insulating film, and gate wiring that is provided on the interlayer insulating film and is electrically connected to the gate pad. The size of the source wiring is not increased, and a high impurity concentration region having a higher impurity concentration than a drift layer is formed on the surface of the substrate at a location directly below the gate pad.

Semiconductor device

A silicon oxide film is formed on an epitaxial layer by dry thermal oxidation, an ohmic electrode is formed on a back surface of a SiC substrate, an ohmic junction is formed between the ohmic electrode and the back surface of the SiC substrate by annealing the SiC substrate, the silicon oxide film is removed, and a Schottky electrode is formed on the epitaxial layer. Then, a sintering treatment is performed to form a Schottky junction between the Schottky electrode and the epitaxial layer.

Manufacturing method of silicon carbide semiconductor device

The present invention includes an n+ type substrate, a drift epitaxial layer formed on the n+ type substrate and having a lower concentration of impurity than the n+ type substrate, a Schottky electrode formed on the drift epitaxial layer, and a PI formed as an insulating film by covering at least an end of the Schottky electrode and an end and a side surface of the drift epitaxial layer.

Silicon carbide semiconductor device and manufacturing method thereof

In order to obtain a silicon carbide semiconductor device that ensures both stability of withstand voltage and reliability in high-temperature operations in its termination end-portion provided for electric-field relaxation in the perimeter of a cell portion driven as a semiconductor element, the termination end-portion is provided with an inorganic protection film having high heat resistance that is formed on an exposed surface of a well region as a first region formed on a side of the cell portion, and an organic protection film having a high electrical insulation capability with a little influence by electric charges that is formed on a surface of an electric-field relaxation region formed in contact relation to an outer lateral surface of the well region and apart from the cell portion, and on an exposed surface of the silicon carbide layer.

Silicon carbide semiconductor device

An object is to provide a method for manufacturing a silicon carbide semiconductor device in which a time required for removing a sacrificial oxide film can be shortened and damage to a surface of the silicon carbide layer can be reduced. The method for manufacturing a silicon carbide semiconductor device includes: (a) performing ion implantation to a silicon carbide layer; (b) performing activation annealing to the ion-implanted silicon carbide layer; (c) removing a surface layer of the silicon carbide layer, to which the activation annealing has been performed, by dry etching; (d) forming a sacrificial oxide film on a surface layer of the silicon carbide layer, to which the dry etching has been performed, by performing sacrificial oxidation thereto; and (e) removing the sacrificial oxide film by wet etching.

Method for manufacturing silicon carbide semiconductor device

An object of the invention is to provide a method for manufacturing a silicon carbide semiconductor device having constant characteristics with reduced variations in forward characteristics. The method for manufacturing the silicon carbide semiconductor device according to the invention includes the steps of: (a) preparing a silicon carbide substrate; (b) forming an epitaxial layer on a first main surface of the silicon carbide substrate; (c) forming a protective film on the epitaxial layer; (d) forming a first metal layer on a second main surface of the silicon carbide substrate; (e) applying heat treatment to the silicon carbide substrate at a predetermined temperature to form an ohmic junction between the first metal layer and the second main surface of the silicon carbide substrate; (f) removing the protective film; (g) forming a second metal layer on the epitaxial layer; and (h) applying heat treatment to the silicon carbide substrate at a temperature from 400&#xb0; C. to 600&#xb0; C. to form a Schottky junction of desired characteristics between the second metal layer and the epitaxial layer.

In a termination structure in which a JTE layer is provided, a level or defect existing at an interface between a semiconductor layer and an insulating film, or a minute amount of adventitious impurities that infiltrate into the semiconductor interface from the insulating film or from an outside through the insulating film becomes a source or a breakdown point of a leakage current, which deteriorates a breakdown voltage. A semiconductor device includes: an ntype semiconductor layer formed on an ntype semiconductor substrate; a first electrode that is formed on the ntype semiconductor layer and functions as a Schottky electrode; a GR layer that is a first p type semiconductor layer formed on a surface of the ntype semiconductor layer below an end of the first electrode and a perimeter thereof; a JTE layer that is formed of a second p type semiconductor layer formed on a bottom and a lateral surface of a groove arranged in a ring shape around the GR layer apart from the GR layer, in a surface of the ntype semiconductor layer; an insulating film provided so as to cover the GR layer and the JTE layer; and a second electrode that is an Ohmic electrode formed below a rear surface of the ntype semiconductor substrate.

Semiconductor device having a groove and a junction termination extension layer surrounding a guard ring layer

On a major surface of an n-type silicon carbide inclined substrate () is formed an n-type voltage-blocking layer () made of silicon carbide by means of epitaxial growth. On the n-type voltage-blocking layer () is formed a p-type silicon carbide region () rectangular when viewed from above. On the surface of the p-type silicon carbide region () is formed a p-type contact electrode (). In the p-type silicon carbide region (), the periphery of the p-type silicon carbide region () that is parallel with a (11-20) plane () of the silicon carbide crystal, which is liable to cause avalanche breakdown, is located on the short side. In this manner, the dielectric strength of a silicon carbide semiconductor device can be improved.

A semiconductor device includes an anode electrode in Schottky contact with an n-type drift layer formed in an SiC substrate and a JTE region formed outside the anode electrode. The JTE region is made up of a first p-type zone formed in an upper portion of the drift layer under an edge of the anode electrode and a second p-type zone formed outside the first p-type zone having a lower surface impurity concentration than the first p-type zone. The second p-type zone is provided 15 &#x3bc;m or more outwardly away from the edge of the anode electrode. The surface impurity concentration of the first p-type zone ranges from 1.8&#xd7;10to 4&#xd7;10cm, and that of the second p-type zone ranges from 1&#xd7;10to 2.5&#xd7;10cm.

Semiconductor device having junction termination extension

The method of manufacturing a semiconductor apparatus can solve problems in that a semiconductor film is not separated completely from a substrate and a great quantity of etchant is required. Ammonium fluoride is added to a hydrofluoric acid solution, so as to improve the etching rate and promote separation of the semiconductor film from the substrate. A manufacturing apparatus according to the present invention is provided with a re-liquefying function capable of again liquefying vapor of hydrofluoric acid solution so as to use liquefied vapor as the etchant so that the etchant is saved.

Method of manufacturing semiconductor apparatus and apparatus thereof

A process of forming electrodes is simplified during modularizing of a solar battery. According to the manufacturing method and the manufacturing apparatus, a thin solar battery is manufactured at a reduced cost and with a better yield. Using a robot which includes a suction chip which can handle a semiconductor film 2 without any damage which is separated from a particular substrate 1, the semiconductor films 2 are each accurately placed through a transparent resin 3 onto a glass substrate 7 which serves as a window of a solar battery, and p-type and n-type electrodes are printed at a time on the semiconductor films 2 which are arranged. Further, since a monolithic tab electrode is soldered to connect the electrodes, the manufacturing processes of the solar battery are simplified.

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Tokyo, Japan

Yoshinori Matsuno