Mitsubishi Denki Kabushiki Kaisha

Yoshinori Hayashi

Shigeo Mizugaki

Toshio Doi

In order to reduce the capacity of a character ROM without reducing the character information, n-bit bit pattern data and sequence data having information necessary for composing n-bit m components are stored in first memory means (character ROM). Second memory means has addresses corresponding to each display position on the screen and holds addresses for the first memory means as a data. In accordance with the address from the second memory means and the sequence data from the first memory means, address modifying means produces an address of a scanning line with respect to pertinent character for the first memory means. According to this address, the bit pattern data is read out from the first memory means.

Screen display element

A pulse generating apparatus equipped with a first comparator (20) for comparing the count value of a timer register (9) with the reference value of a comparing register (10) in terms of each bit and a coincidence detection circuit (21) responsive to the output values of the first comparator (20) to output a coincidence signal when all the bits of the output values thereof are the same. Between the first comparator (20) and the coincidence detection circuit (21) there are provided a plural-bit mask register (17) whose comparison value is set by a CPU (2) and a second comparator (22) for comparing the comparison value of the mask register (17) with the output value of the first comparator (20) in terms of each bit. With this arrangement, the generation timing of the output pulse can variously be changed by setting one time the mask register (17).

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Hyogo, Japan

Yoshinori Hayashi