Thine Electronics, Inc.

Yoshimichi Murakami

Satoshi Miura

Shuhei Yamamoto

Tetsuya Iizuka

Kunihiro Asada

Shunichi Kubo

Toru Nakura

Yohei Ishizone

Norihito Tohge

The present invention relates to a video signal transmission device and the like that can support a variety of system specifications. The device includes a packer unit, an encoder unit, and a serializer. The packer unit generates, from a video signal of one or more pixels, a plurality of block signals having a packet configuration of size corresponding to the number of pixels and the number of tone bits of a color signal constituting a video signal. At this time, a control signal including a pulse having a width corresponding to the number of pixels and the number of tone bits is also generated. The encoder unit applies encoding processing having encoding efficiencies that are different between a first period and a second period of a control signal that are distinguished depending on existence or non-existence of a pulse to the block signals.

Video signal transmission device, video signal reception device and video signal transferring system

This embodiment relates to a clock data recovering apparatus capable of improving consecutive identical digits (CID) resistance. The clock data recovering apparatus includes a clock generating apparatus. The clock generating apparatus includes a signal selection unit, a phase detection unit, a phase control unit, a selection unit, a phase delay unit, a time measurement unit, and a phase selection unit. The phase delay unit includes a plurality of delay elements. The phase selection unit selectively outputs an output signal of any one of the plurality of delay elements as a feedback clock. The phase detection unit detects a phase relation between an edge signal and the feedback clock. The phase control unit outputs a control signal to control a signal selection operation by the phase selection unit such that a phase difference detected by the phase detection unit decreases, to the phase selection unit.

Clock generating apparatus and clock data recovering apparatus

A clock data recovery devicegenerates a recovered clock Recovered Clock and recovered data Recovered Data based on an input signal Data In, and includes a signal selector, a phase delay unit, a time measurement unit, a phase selector, an edge detector, a polarity detector, a logic inverter, and a data output unit. The signal selector, the phase delay unit, the time measurement unit, and the phase selectorconstitute a clock-generation deviceA. The phase delay unitincludes a plurality of cascaded delay elementsto. The phase selectorselects a signal output from the delay element in a position corresponding to a unit interval time among the delay elementsto, and outputs the signal as a feedback clock Feedback Clock.

Clock-generating device and clock data recovery device

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Tokyo, Japan

Yoshimichi Murakami